From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::d42; helo=mail-io1-xd42.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io1-xd42.google.com (mail-io1-xd42.google.com [IPv6:2607:f8b0:4864:20::d42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B71422119EBE6 for ; Wed, 12 Dec 2018 10:17:18 -0800 (PST) Received: by mail-io1-xd42.google.com with SMTP id v10so15553364ios.13 for ; Wed, 12 Dec 2018 10:17:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=9Hk5cMSyMVOQQV+gy4gabHGvpb7bEfnWykVFp3Mx2mk=; b=MG1pNzChYDy4n9f8XNPmZOdDbiPPLMvrbR+/nWqTz2pZZPPQoNHoOlJ8oYXQNLj9L8 uniOzXTjN2OxmqmZgOVDPU7rS+INaW9hFbKNwBocrzMMMrFTo3jH0zpQ64hm1URSOSpO MZcCAQpRLGHULuewVbpo7u4In6kV8mAJBHNrg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=9Hk5cMSyMVOQQV+gy4gabHGvpb7bEfnWykVFp3Mx2mk=; b=W3X/8VgAl1hcldnYk/i2nyhr6nIh6+9wAL/si9Oeuv/WRrOrsyHIihADcjup/4uh31 m/cB6VwFjc00HOFGpFRYCSdQUpBKm43WSkNhapoxYaJPPZGTrLIwOaQyJ05jOvXpkiSC OldbSXdMtHjdUWLra47R0YkaREvlqKDk1YffnQr+gwtiF0QndnJVFHiMxSvAtE+PHRkv Nx1iSggj/38JU5y7XkRp+fRTQbiQ7Pkde0obvlRBFirFkD7CbFt07CMVet1WEj3M+lOE 8anNNgGFjwOWRF4jPxXsQYIAhywtB0g/M3VVK5cn3mFRx/PExLtEoNTMB6eKUB/Z+qBr TzeA== X-Gm-Message-State: AA+aEWbcvULxVrAfMNR7iCSkIcfJkrzBhj9zlbe3opzJ3zwTuq39pa0v h8DDPCZFF3reHkLbI1D2QGCDoDsXes67cGouiW3dEw== X-Google-Smtp-Source: AFSGD/WaQ3IVYYexolJgd/Lf+BJtW0J+GD3oJGmjGLlGkafLWsdkvhguo8sNPurRcljVMkcwRdAftmnkfe8JuwldU28= X-Received: by 2002:a6b:5d01:: with SMTP id r1mr16692774iob.170.1544638637713; Wed, 12 Dec 2018 10:17:17 -0800 (PST) MIME-Version: 1.0 References: <20181212151015.117308-1-ruiyu.ni@intel.com> In-Reply-To: <20181212151015.117308-1-ruiyu.ni@intel.com> From: Ard Biesheuvel Date: Wed, 12 Dec 2018 19:17:06 +0100 Message-ID: To: Ruiyu Ni Cc: "edk2-devel@lists.01.org" , "Wu, Hao A" Subject: Re: [PATCH] MdeModulePkg/PciBus: Fix system hang when no PCI Option ROM exists X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 12 Dec 2018 18:17:19 -0000 Content-Type: text/plain; charset="UTF-8" On Wed, 12 Dec 2018 at 16:08, Ruiyu Ni wrote: > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1394 > > When there is no PCI option ROM exists, today's logic still creates > virtual BAR for option ROM using Length = 0, Alignment = (-1). > It causes the final MEM32 alignment requirement is as big as > 0xFFFFFFFF_FFFFFFFF. > > The patch fixes this issue by only creating virtual BAR for option > ROM when there is PCI option ROM. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ruiyu Ni > Cc: Chiu Chasel > Cc: Hao A Wu > Cc: Jian J Wang Tested-by: Ard Biesheuvel > --- > MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > index 7255bcfbbc..ee5c77147e 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c > @@ -515,10 +515,12 @@ PciHostBridgeResourceAllocator ( > // All devices' Option ROM share the same MEM32 resource. > // > MaxOptionRomSize = GetMaxOptionRomSize (RootBridgeDev); > - RootBridgeDev->PciBar[0].BarType = PciBarTypeOpRom; > - RootBridgeDev->PciBar[0].Length = MaxOptionRomSize; > - RootBridgeDev->PciBar[0].Alignment = MaxOptionRomSize - 1; > - GetResourceFromDevice (RootBridgeDev, IoBridge, Mem32Bridge, PMem32Bridge, Mem64Bridge, PMem64Bridge); > + if (MaxOptionRomSize != 0) { > + RootBridgeDev->PciBar[0].BarType = PciBarTypeOpRom; > + RootBridgeDev->PciBar[0].Length = MaxOptionRomSize; > + RootBridgeDev->PciBar[0].Alignment = MaxOptionRomSize - 1; > + GetResourceFromDevice (RootBridgeDev, IoBridge, Mem32Bridge, PMem32Bridge, Mem64Bridge, PMem64Bridge); > + } > > // > // Create resourcemap by going through all the devices subject to this root bridge > -- > 2.16.1.windows.1 > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel