Re: [PATCH edk2-platforms] Silicon/SynQuacer/DeviceTree: remove SCPI/MHU nodes

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

On 8 February 2018 at 16:17, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Thu, Feb 08, 2018 at 02:57:51PM +0000, Ard Biesheuvel wrote:
>> On our SynQuacer based platform, power state handling and other
>> low-level duties are handled by the secure firmware, not by the
>> OS, so remove the various MHU/SCPI related nodes from the device
>> tree.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>
> Ah, yes please.
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

Pushed as 69f992e8543128df4e40ae6d7418e6dab8b6a8fa

Thanks.

>
>> ---
>>  Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 --------------------
>>  1 file changed, 30 deletions(-)
>>
>> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
>> index 3db3c5ed1c50..a113780c2ab8 100644
>> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
>> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
>> @@ -388,36 +388,6 @@
>>          method = "smc";
>>      };
>>
>> -    mailbox: mhu@45000000 {
>> -        compatible = "arm,mhu", "arm,primecell";
>> -        reg = <0x0 0x45000000 0x0 0x1000>;
>> -        interrupts = <GIC_SPI 482 IRQ_TYPE_LEVEL_HIGH>,
>> -                     <GIC_SPI 480 IRQ_TYPE_LEVEL_HIGH>; /* Non-Sec */
>> -        interrupt-names = "mhu_lpri_rx", "mhu_hpri_rx";
>> -        #mbox-cells = <1>;
>> -        clocks = <&clk_apb>;
>> -        clock-names = "apb_pclk";
>> -    };
>> -
>> -    sram: sram@45200000 {
>> -        compatible = "mmio-sram";
>> -        reg = <0x0 0x45200000 0x0 0x200>;
>> -
>> -        #address-cells = <1>;
>> -        #size-cells = <1>;
>> -        ranges = <0 0x0 0x45200000 0x200>;
>> -
>> -        cpu_scp_hpri: scp-shmem@0 {
>> -          reg = <0x0 0x200>;
>> -        };
>> -    };
>> -
>> -    scpi {
>> -        compatible = "arm,scpi";
>> -        mboxes = <&mailbox 1>;
>> -        shmem = <&cpu_scp_hpri>;
>> -    };
>> -
>>      clk_uart: refclk62500khz {
>>          compatible = "fixed-clock";
>>          #clock-cells = <0>;
>> --
>> 2.11.0
>>