From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::244; helo=mail-it0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x244.google.com (mail-it0-x244.google.com [IPv6:2607:f8b0:4001:c0b::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 81490222DE12E for ; Thu, 8 Feb 2018 10:37:58 -0800 (PST) Received: by mail-it0-x244.google.com with SMTP id i144so7752400ita.3 for ; Thu, 08 Feb 2018 10:43:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=LMuyAUXe8l6VZdkJow/qyxK0YOakhFuci1Ycsi/X/mE=; b=G+x1ElYxRiL2ugEMVXfwFUXbFM0MYIr2xrhdoC1xoHqGdvP8yt1jyZClkwlbuF87Ko jEjQ8SzkWCoW0GssoWNw2V1K8kJ4XAQbuGacAsy43H9u0C9tgPDAv2Gu9z5643HF7r6w w47aPfCiVNhydKR/vcvzevHFA6Or4u90WNAQo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=LMuyAUXe8l6VZdkJow/qyxK0YOakhFuci1Ycsi/X/mE=; b=JsNh3JpEg5DvBdY/Q5doeKdw7vmhWaXUGGdZSB5cKQDFrExvrh2oE4mlppn9I3d6Nf hxcovA6mL0z3aAbQ4sPSmshm+69SLHmb4V2wA8uYGt16qZXQ1VMuJo3ZerKvyPIueTT8 v4goddTL2i4WQUUu6x/GRPxVKWFq69HcoDvbtapITZUbcPsEDg5D33wfSxt6THr/drrZ iWU9l+zWOnt9ld7LL8Q230XShT7EVINCKBZiT6ZxekueOuCc9fOFJUChs0/aQUCsptWx 2EkOFRbyj8uEQbY7HZOKvxUi1wZNYdF+52r5TM83UwRnBBY9B03t3AWcSfIbiUgCczsp Ndog== X-Gm-Message-State: APf1xPB82SAfxfgJudzvkL48MDRJnF9kivM/eSIDtN4xBQZh7jmywxgN vJp99OjBDRUMmTxRBsV+gGYZG35bsKu3NGbBsEKDAA== X-Google-Smtp-Source: AH8x225J3eeCcR/dLykmM/IcVf9oxo3E9kzRwb7FAas6aep22wUs6XDxNkjH/u7clsa+HuJYAQvOQCzKEDaJBfNSFNU= X-Received: by 10.36.216.65 with SMTP id b62mr118398itg.17.1518115423546; Thu, 08 Feb 2018 10:43:43 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.112.13 with HTTP; Thu, 8 Feb 2018 10:43:43 -0800 (PST) In-Reply-To: <20180208161744.ngr7n2dbspi3yggz@bivouac.eciton.net> References: <20180208145751.10252-1-ard.biesheuvel@linaro.org> <20180208161744.ngr7n2dbspi3yggz@bivouac.eciton.net> From: Ard Biesheuvel Date: Thu, 8 Feb 2018 18:43:43 +0000 Message-ID: To: Leif Lindholm Cc: "edk2-devel@lists.01.org" Subject: Re: [PATCH edk2-platforms] Silicon/SynQuacer/DeviceTree: remove SCPI/MHU nodes X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Feb 2018 18:38:00 -0000 Content-Type: text/plain; charset="UTF-8" On 8 February 2018 at 16:17, Leif Lindholm wrote: > On Thu, Feb 08, 2018 at 02:57:51PM +0000, Ard Biesheuvel wrote: >> On our SynQuacer based platform, power state handling and other >> low-level duties are handled by the secure firmware, not by the >> OS, so remove the various MHU/SCPI related nodes from the device >> tree. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel > > Ah, yes please. > Reviewed-by: Leif Lindholm Pushed as 69f992e8543128df4e40ae6d7418e6dab8b6a8fa Thanks. > >> --- >> Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 -------------------- >> 1 file changed, 30 deletions(-) >> >> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi >> index 3db3c5ed1c50..a113780c2ab8 100644 >> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi >> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi >> @@ -388,36 +388,6 @@ >> method = "smc"; >> }; >> >> - mailbox: mhu@45000000 { >> - compatible = "arm,mhu", "arm,primecell"; >> - reg = <0x0 0x45000000 0x0 0x1000>; >> - interrupts = , >> - ; /* Non-Sec */ >> - interrupt-names = "mhu_lpri_rx", "mhu_hpri_rx"; >> - #mbox-cells = <1>; >> - clocks = <&clk_apb>; >> - clock-names = "apb_pclk"; >> - }; >> - >> - sram: sram@45200000 { >> - compatible = "mmio-sram"; >> - reg = <0x0 0x45200000 0x0 0x200>; >> - >> - #address-cells = <1>; >> - #size-cells = <1>; >> - ranges = <0 0x0 0x45200000 0x200>; >> - >> - cpu_scp_hpri: scp-shmem@0 { >> - reg = <0x0 0x200>; >> - }; >> - }; >> - >> - scpi { >> - compatible = "arm,scpi"; >> - mboxes = <&mailbox 1>; >> - shmem = <&cpu_scp_hpri>; >> - }; >> - >> clk_uart: refclk62500khz { >> compatible = "fixed-clock"; >> #clock-cells = <0>; >> -- >> 2.11.0 >>