From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::142; helo=mail-it1-x142.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it1-x142.google.com (mail-it1-x142.google.com [IPv6:2607:f8b0:4864:20::142]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 638392119C8AF for ; Wed, 12 Dec 2018 04:30:22 -0800 (PST) Received: by mail-it1-x142.google.com with SMTP id x19so8755744itl.1 for ; Wed, 12 Dec 2018 04:30:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=sZZoVQG7LHS0K8TGHQBZhtQD0h7g5wEVfEC77uEhdao=; b=PRHjZkbNA6PBThxGzbE//393uMW9tZQqNE7STs8+nh/MNAvQr+YygiWbxY1K3/B2lM zAx0RYF1Ll8KoNdl6LN0H+xvi9TxL0r61RrWRcUdf8Qzd/ohXpheM+sbmwkWl59QG3Ct Vb8YMUgOLiIiT61ydbXtBHMQ+oXqU7Mx4+pO8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=sZZoVQG7LHS0K8TGHQBZhtQD0h7g5wEVfEC77uEhdao=; b=nl3Qxm+ZiAsjhmhx4IhX/Nr0IVnXQ9b39bxyp4VD4kiRQuyAea5cUVSygVqgGdh1iB SVWW1SEVxfhIYak1E4PFeqEHtcyqk8ADl54tVFR7AzSUyq4sK3IY6mP/lq5OPw0xApDZ sszCFc+tq2StaIVH8wLg50i3hewdHX24oHHuBCtlCUDHFthCgjHNaQ5GiqZ64I92FcBp jHA1qilJ31s8Mciyuy2fsD6uDtjte6BxZzcnYL/13r8dYm06QZ4fNsj06NpVO2FhIZE/ CxIJGjbol2HXLrvuir1jPo7jnnBqKsQytKKYb9XFziQtF4keKP7Ahvht+pPqGQpONJ2+ 8/Ng== X-Gm-Message-State: AA+aEWY/W5z/4NA9ig/WLJae4LoQjOl+VwiWVJMja5/e4GZq+QMto08a OX8cPIhdZDxgUOmEWdZsXeydQ/IEP3WD9qwV7bB92MUv X-Google-Smtp-Source: AFSGD/UJ6qOm7b9axB5QLa20cTVBrc+FE2cOIs22L2xTMFEnRFldakghhRjLmUU48aAZ1izwYaastr0cnw6XWhp0SMM= X-Received: by 2002:a24:710:: with SMTP id f16mr5047306itf.121.1544617821732; Wed, 12 Dec 2018 04:30:21 -0800 (PST) MIME-Version: 1.0 References: <20181212103308.8099-1-ard.biesheuvel@linaro.org> <20181212103308.8099-3-ard.biesheuvel@linaro.org> In-Reply-To: <20181212103308.8099-3-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Wed, 12 Dec 2018 13:30:10 +0100 Message-ID: To: "edk2-devel@lists.01.org" Cc: "Kinney, Michael D" , "Gao, Liming" , "Feng, Bob C" , Leif Lindholm , Laszlo Ersek Subject: Re: [PATCH 2/3] BaseTools/tools_def ARM CLANG35: work around -mno-movt option name change X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 12 Dec 2018 12:30:23 -0000 Content-Type: text/plain; charset="UTF-8" On Wed, 12 Dec 2018 at 11:33, Ard Biesheuvel wrote: > > PE/COFF only has a very limited id space for runtime relocations, and > so it defines only a single relocation for movw/movt instruction pairs, > which can be combined to load a 32-bit symbol reference into a register. > For this to work as expected, these instructions must always appear in > the same order and adjacently, and this is something few compilers take > into account, unless they target PE/COFF explicitly (and this is not the > case for our ELF based toolchains) > > For Clang 3.6 and later, we can pass the -mno-movt option to suppress > movw/movt pairs entirely, which works around the issue. Unfortunately, > for Clang 3.5, the option is called differently (-mllvm -arm-use-movt=0) > and mutually incompatible between 3.5 and 3.6. > > Since it is desirable for the CLANG35 toolchain to be usable on newer > versions of Clang as well (given that it is the only non-LTO alternative > to CLANG38), let's work around this issue in a way that permits versions > 3.5 and newer of Clang to be used with the CLANG35 profile. > > So pass the -mkernel flag instead (and drop the -mno-unaligned-access > in *_CLANG35_ARM_CC_XIPFLAGS which now becomes redundant, and which > Clang complains about). This also inhibits movw/movt generation, along > with some other changes (e.g., long calls) which do affect code generation > but not in a undesirable manner. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > BaseTools/Conf/tools_def.template | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template > index ac2b95e0f5ba..2ba833e1fb06 100755 > --- a/BaseTools/Conf/tools_def.template > +++ b/BaseTools/Conf/tools_def.template > @@ -5249,7 +5249,7 @@ DEFINE CLANG35_AARCH64_CC_FLAGS = DEF(GCC_AARCH64_CC_FLAGS) DEF(CLANG35_AARCH64 > *_CLANG35_ARM_ASM_FLAGS = DEF(GCC_ASM_FLAGS) DEF(CLANG35_ARM_TARGET) $(ARCHASM_FLAGS) $(PLATFORM_FLAGS) -Qunused-arguments > *_CLANG35_ARM_DLINK_FLAGS = DEF(CLANG35_ARM_TARGET) DEF(GCC_ARM_DLINK_FLAGS) > *_CLANG35_ARM_DLINK2_FLAGS = DEF(GCC_DLINK2_FLAGS_COMMON) -Wl,--defsym=PECOFF_HEADER_SIZE=0x220 > -*_CLANG35_ARM_PLATFORM_FLAGS = -march=armv7-a > +*_CLANG35_ARM_PLATFORM_FLAGS = -march=armv7-a -mkernel -Qunused-arguments Alternatively, we could switch to armv6 code generation here (except for the .S pieces which us Thumb2 instructions), which also gets rid of the movw/movt pairs. > *_CLANG35_ARM_PP_FLAGS = DEF(GCC_PP_FLAGS) DEF(CLANG35_ARM_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) > *_CLANG35_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS) > *_CLANG35_ARM_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS) DEF(CLANG35_ARM_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) > -- > 2.19.2 >