From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=sQWsce5y; spf=pass (domain: linaro.org, ip: 209.85.166.193, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-it1-f193.google.com (mail-it1-f193.google.com [209.85.166.193]) by groups.io with SMTP; Thu, 16 May 2019 06:53:45 -0700 Received: by mail-it1-f193.google.com with SMTP id m140so6372931itg.2 for ; Thu, 16 May 2019 06:53:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=bmnWPfQajS9ITP9XAH334oqrauPu5nSAuS4Zz4tqLfY=; b=sQWsce5yiDQVGQroc5fik8gy6Cxuvxfd0u2NPVJsb+W9uVK9kyjtgx8gBIXLAPv3Li lhROE/QjOW3bg/p3QkCwOtX5BBV64HGpii3t5MokGaMKA12/4/SWU7nytmqfyqrsVTxd 1uaqAnjMFzU8exOVwXss9bzVTocXFzDdA+AMvCiHaacmIm7qpLwXYQSXagLPTnsenms7 Xm8UdVh327lQFGlS8KQYrjNuDhnBpQgveAI6nz6ksYdCH3qVGRO1M6OTjdYN+3i29hol qe/Gmpt4t++bKjnDx+8QEucKLgno6UibhKNTKOW3DzFrwn5EwJYwZb2NLvubt290fNNa 4Vig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=bmnWPfQajS9ITP9XAH334oqrauPu5nSAuS4Zz4tqLfY=; b=m8UU67N4AwWEkckY3n/Y2rBVGMyaf8utExsC1l2OolP8In/CqG5M5vMPMvWfTZ9m0w tbmJynjbDEU1Y3l7/S8q6SFACaZrj5gFvSyLkHJT2ioCY1Mx6nedRACSRThLYJLDeStG azIt1I1eJil/cpqUp8UgkegWmTdG3ZDNsR6OKvD+bca0wvPtEG+lMgkd4fnlSq4lDMsF 35NF13glDClw8UdyHOxm6Nv8lInJcuhNIkrEa9dOUlrTrmTqb2+Dh+fl/7w/YV7ssAvb RRp5zr8W1xqMpgS7/DfRRnMNGAAllCkQ8mPz7vuvYafyS+U9YUoYs4bPxORi//niHhNT zUBw== X-Gm-Message-State: APjAAAXGsJMSxnDo3RWxIXmThM6KANr0UcHu5DBOhycVWRY3JyrVq2WB DE5tYn5nkvs2jpmgoUg2SiWQrD4GRI9qbSP23u5Ibg== X-Google-Smtp-Source: APXvYqyRSvMB+6ybzGfGgJ+rOj+cVAjOH3zfxRsWcdQHCCBFoantpLxZMjKOrNgzI3SMt+W5iAOz5eLQDdE8TzfScFQ= X-Received: by 2002:a05:660c:444:: with SMTP id d4mr14018985itl.158.1558014825011; Thu, 16 May 2019 06:53:45 -0700 (PDT) MIME-Version: 1.0 References: <1557395622-32425-1-git-send-email-mw@semihalf.com> <1557395622-32425-6-git-send-email-mw@semihalf.com> In-Reply-To: <1557395622-32425-6-git-send-email-mw@semihalf.com> From: "Ard Biesheuvel" Date: Thu, 16 May 2019 15:53:32 +0200 Message-ID: Subject: Re: [edk2-platforms: PATCH 05/14] Marvell/Armada7k8k: MvBoardDesc: Extend protocol with PCIE support To: Marcin Wojtas Cc: edk2-devel-groups-io , Leif Lindholm , =?UTF-8?B?SmFuIETEhWJyb8Wb?= , Grzegorz Jaszczyk , Kostya Porotchkin , Jici Gao , Rebecca Cran , kettenis@jive.eu Content-Type: text/plain; charset="UTF-8" On Thu, 9 May 2019 at 11:54, Marcin Wojtas wrote: > > Introduce new callback that can provide information about PCIE > controllers, which are used on the platform. According ArmadaSoCDescLib > ArmadaBoardDescLib routines are used for obtaining required data. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > --- > Silicon/Marvell/Include/Protocol/BoardDesc.h | 22 +++++ > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 86 ++++++++++++++++++++ > 2 files changed, 108 insertions(+) > > diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h > index 02905ea..c38ad86 100644 > --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h > +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h > @@ -90,6 +90,27 @@ EFI_STATUS > IN OUT MV_BOARD_XHCI_DESC **XhciDesc > ); > > +/** > + Return the description of PCIE controllers used on the platform. > + > + @param[in out] *This Pointer to board description protocol. > + @param[in out] **PcieDescription Array containing PCIE controllers' > + description. > + > + @retval EFI_SUCCESS The data were obtained successfully. > + @retval EFI_NOT_FOUND None of the controllers is used. > + @retval EFI_INVALID_PARAMETER Description wrongly defined. > + @retval EFI_OUT_OF_RESOURCES Lack of resources. > + @retval Other Return error status. > + > +**/ > +typedef > +EFI_STATUS > +(EFIAPI *MV_BOARD_PCIE_DESCRIPTION_GET) ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_PCIE_DESCRIPTION **PcieDescription > + ); > + > typedef > EFI_STATUS > (EFIAPI *MV_BOARD_DESC_PP2_GET) ( > @@ -121,6 +142,7 @@ struct _MARVELL_BOARD_DESC_PROTOCOL { > MV_BOARD_DESC_XHCI_GET BoardDescXhciGet; > MV_BOARD_DESC_FREE BoardDescFree; > MV_BOARD_GPIO_DESCRIPTION_GET GpioDescriptionGet; > + MV_BOARD_PCIE_DESCRIPTION_GET PcieDescriptionGet; > }; > > #endif // __MARVELL_BOARD_DESC_PROTOCOL_H__ > diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > index 973c362..9cd95bd 100644 > --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > @@ -36,6 +36,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > MV_BOARD_DESC *mBoardDescInstance; > > STATIC MV_BOARD_GPIO_DESCRIPTION *mGpioDescription; > +STATIC MV_BOARD_PCIE_DESCRIPTION *mPcieDescription; > > STATIC > EFI_STATUS > @@ -444,6 +445,90 @@ MvBoardDescXhciGet ( > return EFI_SUCCESS; > } > > +/** > + Return the description of PCIE controllers used on the platform. > + > + @param[in out] *This Pointer to board description protocol. > + @param[in out] **PcieDescription Array containing PCIE controllers' > + description. > + > + @retval EFI_SUCCESS The data were obtained successfully. > + @retval EFI_NOT_FOUND None of the controllers is used. > + @retval EFI_INVALID_PARAMETER Description wrongly defined. > + @retval EFI_OUT_OF_RESOURCES Lack of resources. > + @retval Other Return error status. > + > +**/ > +STATIC > +EFI_STATUS > +MvBoardPcieDescriptionGet ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_PCIE_DESCRIPTION **PcieDescription > + ) > +{ > + UINTN SoCPcieControllerCount, BoardPcieControllerCount, SoCIndex, BoardIndex; > + EFI_PHYSICAL_ADDRESS *PcieBaseAddresses; > + MV_PCIE_CONTROLLER *PcieControllers; > + EFI_STATUS Status; > + > + /* Use existing structure if already created. */ > + if (mPcieDescription != NULL) { > + *PcieDescription = mPcieDescription; Since you are returning a cached copy here, I'd prefer it if the prototype of the OUT parameter was MV_BOARD_PCIE_DESCRIPTION CONST** rather than MV_BOARD_PCIE_DESCRIPTION**, since now, you are returning a pointer to internal state of this driver. (I guess this might apply to other methods as well) > + return EFI_SUCCESS; > + } > + > + /* Get SoC data about all available PCIE controllers. */ > + Status = ArmadaSoCPcieGet (&PcieBaseAddresses, &SoCPcieControllerCount); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + /* Get per-board information about all used PCIE controllers. */ > + Status = ArmadaBoardPcieControllerGet (&PcieControllers, > + &BoardPcieControllerCount); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + /* Sanity check of the board description. */ > + if (BoardPcieControllerCount > SoCPcieControllerCount) { > + DEBUG ((DEBUG_ERROR, "%a: Too many controllers described\n", __FUNCTION__)); > + return EFI_INVALID_PARAMETER; > + } > + > + for (BoardIndex = 0; BoardIndex < BoardPcieControllerCount; BoardIndex++) { > + for (SoCIndex = 0; SoCIndex < SoCPcieControllerCount; SoCIndex++) { > + if (PcieControllers[BoardIndex].PcieBaseAddress == > + PcieBaseAddresses[SoCIndex]) { > + /* Match found */ > + break; > + } > + } > + if (SoCIndex == SoCPcieControllerCount) { > + DEBUG ((DEBUG_ERROR, > + "%a: Controller #%d base address invalid: 0x%x\n", > + __FUNCTION__, > + BoardIndex, > + PcieControllers[BoardIndex].PcieBaseAddress)); > + return EFI_INVALID_PARAMETER; > + } > + } > + > + /* Allocate and fill board description. */ > + mPcieDescription = AllocateZeroPool (sizeof (MV_BOARD_PCIE_DESCRIPTION)); > + if (mPcieDescription == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); > + return EFI_OUT_OF_RESOURCES; > + } > + > + mPcieDescription->PcieControllers = PcieControllers; > + mPcieDescription->PcieControllerCount = BoardPcieControllerCount; > + > + *PcieDescription = mPcieDescription; > + > + return EFI_SUCCESS; > +} > + > STATIC > EFI_STATUS > MvBoardDescPp2Get ( > @@ -621,6 +706,7 @@ MvBoardDescInitProtocol ( > BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet; > BoardDescProtocol->BoardDescFree = MvBoardDescFree; > BoardDescProtocol->GpioDescriptionGet = MvBoardGpioDescriptionGet; > + BoardDescProtocol->PcieDescriptionGet = MvBoardPcieDescriptionGet; > > return EFI_SUCCESS; > } > -- > 2.7.4 >