Re: [platforms: PATCH 08/13] Marvell/Armada: Modify GICC alias

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

On 10 October 2017 at 15:56, Marcin Wojtas <mw@semihalf.com> wrote:
> Hi Ard,
>
> 2017-10-10 16:53 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
>> On Mon, Oct 09, 2017 at 07:00:57PM +0200, Marcin Wojtas wrote:
>>> From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>>
>>> The GIC architecture mandates that the CPU interface, which consists
>>> of 2 consecutive 4 KB frames, can be mapped using separate mappings.
>>> Since this is problematic on 64 KB pages, the MMU-400 aliases each
>>> frame 16 times, and the two consecutive frames can be found at offset
>>> 0xf000. This patch is intended to expose correct GICC alias via
>>> MADT, once ACPI support is added.
>>
>> I'm afraid I don't quite understand this message.
>>
>> The change seems to be that the InterfaceBase moves from the first 4KB
>> alias inside a 64KB page to the last alias within the same page.
>> That seems valid, but I don't see how it resolves anything described
>> in this message?
>>

Because now, GICC + 4 KB will point at the second frame, and so the
two frames appear adjacently, and precisely 4 KB apart. And at the
same time, they are still covered by distinct 64 KB pages so it even
works when running the OS with 64k pages.