From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by mx.groups.io with SMTP id smtpd.web11.843.1582561895143998545 for ; Mon, 24 Feb 2020 08:31:35 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=iZph+gbZ; spf=pass (domain: linaro.org, ip: 209.85.221.67, mailfrom: ard.biesheuvel@linaro.org) Received: by mail-wr1-f67.google.com with SMTP id g3so11102220wrs.12 for ; Mon, 24 Feb 2020 08:31:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=9CKaT/09oFbz3U2WhyE5g0pU3U9uPbku4WG970SsGUM=; b=iZph+gbZmfZz/2L+aTdOJmD7GEVGeZ6z2+XNoZkPvKl+kEi0WYCoo+zdSAjAWHe3rX a2Tf26mbbguQXGjsHgL2mm5zMhJHsDY/cU98eMI5/iE3YeifJ3cIDfj0htnySzsDobhr 2rkOQt5JcvzehTpgIpmrZEzG8dctbTPKp+qHyWxNnjnYtO847HvRqpjgVmco9qqsIvYO 0/+OjAHtn+yetkU/W00ozMQTCDEpmJh0EEKIhPKj0N6TuD83BTWWVbSlDduti8qnMwS4 QwrzTQXbfGJlUd0G/dFLmRiyINpdHVbq4We/g58v+3yHAq+XcteM2sYpMYN66ybxXlWV SErg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=9CKaT/09oFbz3U2WhyE5g0pU3U9uPbku4WG970SsGUM=; b=Exnb7KpA/x2Me8GMz6jIog+f6thnIMPdw47DaAC8/XaARJ4OF6zqYWtjEc0SVMl5ql le3ZqXe7N/0B68N8n8tuWmOCVlk9+RAWw85RMX5kAYU/Zf+vm2+cQpcYnLWnfWW6eqYd rEce9leRvi2ojRMMvhYXJtUS9DBjrDl9bS2/8H16HlGHAkRh7uJCap8l50UTuGcNprYs 6IjMkpGsACY6xbzyvkVZDNgtMJjC7nkfSoMTaPXdE36nNWbTCSogiqQNvSvUvKTkkas7 6GItDf7ZumJA3rbMtwgW3kd7bjNR/6mcrmVZ0WTjxw/J0bADHMhShB6Us9u3rro3SHeK FJhg== X-Gm-Message-State: APjAAAVCu5bqzI5aXyShBXSCZVBX32mC4GYMDUHeJe0J532ijrSZOBSZ GdXf1emV9y7Fj+bFydXWWsEdsaUi5+hVgYxIcrtT8A== X-Google-Smtp-Source: APXvYqzRnc9MG57nwmY1vx1E8X8h2qalu8AD/wlX/mS15/oXREPMxrc44u2GUaapqIWu5V9nUA43waBEuJ0qcpbaiPo= X-Received: by 2002:adf:fd8d:: with SMTP id d13mr68259353wrr.208.1582561893510; Mon, 24 Feb 2020 08:31:33 -0800 (PST) MIME-Version: 1.0 References: <20200223172537.28464-1-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> From: "Ard Biesheuvel" Date: Mon, 24 Feb 2020 17:31:21 +0100 Message-ID: Subject: Re: [PATCH 00/16] OvmfPkg: support VCPU hotplug with -D SMM_REQUIRE To: Laszlo Ersek Cc: edk2-devel-groups-io , Eric Dong , Hao A Wu , Igor Mammedov , Jian J Wang , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Ray Ni Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sun, 23 Feb 2020 at 18:25, Laszlo Ersek wrote: > > Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 > Repo: https://github.com/lersek/edk2.git > Branch: vcpu_hotplug_smm_bz_1512 > > This series implements VCPU hotplug with SMM for OVMF, i.e., when OVMF > is built with "-D SMM_REQUIRE". > > SEV support and hot-unplug support are out of scope for now. > > Patch#13 ("OvmfPkg/CpuHotplugSmm: complete root MMI handler for CPU > hotplug") describes tests and results in the Notes section. > > Obviously this is not being proposed for the edk2-stable202002 tag > (which is in hard feature freeze). > > QEMU needs patches for this feature, too. I've done the development > against a QEMU patch that Igor hacked up quickly at my request. It was > never posted (it needs some polish for upstreaming), but it has allowed > me to write and test this feature. > > The key parts of the QEMU commit message are: > > > x68:acpi: trigger SMI before scanning for added/removed CPUs > > > > Firmware should only scan for new CPUs and not modify events in CPU > > hotplug registers. > > Igor's patch is based on upstream QEMU commit 418fa86dd465. Until he > decides to post or otherwise share the patch, its effect can be > expressed with a diff, taken in the Linux guest, between decompiled > before/after versions of the QEMU-generated DSDT: > > > @@ -81,6 +81,27 @@ > > Return (Arg3) > > } > > } > > + > > + Device (SMI0) > > + { > > + Name (_HID, "PNP0A06" /* Generic Container Device */) // = _HID: Hardware ID > > + Name (_UID, "SMI resources") // _UID: Unique ID > > + Name (_STA, 0x0B) // _STA: Status > > + Name (_CRS, ResourceTemplate () // _CRS: Current Resource= Settings > > + { > > + IO (Decode16, > > + 0x00B2, // Range Minimum > > + 0x00B2, // Range Maximum > > + 0x01, // Alignment > > + 0x01, // Length > > + ) > > + }) > > + OperationRegion (SMIR, SystemIO, 0xB2, One) > > + Field (SMIR, ByteAcc, NoLock, WriteAsZeros) > > + { > > + SMIC, 8 > > + } > > + } > > } > > > > Scope (_SB) > > @@ -3016,6 +3037,7 @@ > > Method (CSCN, 0, Serialized) > > { > > Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) > > + \_SB.SMI0.SMIC =3D 0x04 > > Local0 =3D One > > While ((Local0 =3D=3D One)) > > { > > where the CSCN ("CPU scan") method is the _E02 GPE ("CPU hotplug") event > handler: > > > Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE= , xx=3D0x00-0xFF > > { > > \_SB.CPUS.CSCN () > > } > > If you'd like to test this series, please ask Igor for the QEMU patch. > :) > > The series has been formatted for review with the following options: > > --stat=3D1000 --stat-graph-width=3D20 \ > --unified=3D22 \ > --find-copies=3D43 --find-copies-harder \ > --base=3Dmaster \ > > At every stage in the series: > - the tree builds, > - "PatchCheck.py" is happy, > - and OVMF works without regressions. > > (Hotplug is made functional at patch#13, and "S3 after hotplug" is > completed at patch#16. So those actions should not be attempted before > said respective patches.) > I skimmed these patches, and it all looks reasonable to me, but I am by no means knowledgeable on x86 SMM internals. So provided the @intel.com folks on cc are happy with these changes, and ack the series, Acked-by: Ard Biesheuvel > > Cc: Ard Biesheuvel > Cc: Eric Dong > Cc: Hao A Wu > Cc: Igor Mammedov > Cc: Jian J Wang > Cc: Jiewen Yao > Cc: Jordan Justen > Cc: Michael Kinney > Cc: Philippe Mathieu-Daud=C3=A9 > Cc: Ray Ni > > Thanks > Laszlo > > Laszlo Ersek (16): > MdeModulePkg/PiSmmCore: log SMM image start failure > UefiCpuPkg/PiSmmCpuDxeSmm: fix S3 Resume for CPU hotplug > OvmfPkg: clone SmmCpuPlatformHookLib from UefiCpuPkg > OvmfPkg: enable SMM Monarch Election in PiSmmCpuDxeSmm > OvmfPkg: enable CPU hotplug support in PiSmmCpuDxeSmm > OvmfPkg/CpuHotplugSmm: introduce skeleton for CPU Hotplug SMM driver > OvmfPkg/CpuHotplugSmm: add hotplug register block helper functions > OvmfPkg/CpuHotplugSmm: define the QEMU_CPUHP_CMD_GET_ARCH_ID macro > OvmfPkg/CpuHotplugSmm: add function for collecting CPUs with events > OvmfPkg/CpuHotplugSmm: collect CPUs with events > OvmfPkg/CpuHotplugSmm: introduce Post-SMM Pen for hot-added CPUs > OvmfPkg/CpuHotplugSmm: introduce First SMI Handler for hot-added CPUs > OvmfPkg/CpuHotplugSmm: complete root MMI handler for CPU hotplug > OvmfPkg: clone CpuS3DataDxe from UefiCpuPkg > OvmfPkg/CpuS3DataDxe: superficial cleanups > OvmfPkg/CpuS3DataDxe: enable S3 resume after CPU hotplug > > MdeModulePkg/Core/PiSmmCore/Dispatcher.c = = | 6 + > OvmfPkg/CpuHotplugSmm/ApicId.h = = | 23 ++ > OvmfPkg/CpuHotplugSmm/CpuHotplug.c = = | 426 ++++++++++++++++++++ > OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf = = | 64 +++ > OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm = = | 149 +++++++ > OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h = = | 41 ++ > OvmfPkg/CpuHotplugSmm/PostSmmPen.nasm = = | 137 +++++++ > OvmfPkg/CpuHotplugSmm/QemuCpuhp.c = = | 301 ++++++++++++++ > OvmfPkg/CpuHotplugSmm/QemuCpuhp.h = = | 61 +++ > OvmfPkg/CpuHotplugSmm/Smbase.c = = | 252 ++++++++++++ > OvmfPkg/CpuHotplugSmm/Smbase.h = = | 46 +++ > OvmfPkg/Include/IndustryStandard/Q35MchIch9.h = = | 5 +- > OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h = = | 3 + > OvmfPkg/OvmfPkgIa32.dsc = = | 7 +- > OvmfPkg/OvmfPkgIa32.fdf = = | 3 +- > OvmfPkg/OvmfPkgIa32X64.dsc = = | 7 +- > OvmfPkg/OvmfPkgIa32X64.fdf = = | 3 +- > OvmfPkg/OvmfPkgX64.dsc = = | 7 +- > OvmfPkg/OvmfPkgX64.fdf = = | 3 +- > UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.c= =3D> OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.c= | 45 ++- > UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.i= nf =3D> OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu= .inf | 24 +- > UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c = = | 14 +- > {UefiCpuPkg =3D> OvmfPkg}/CpuS3DataDxe/CpuS3Data.c = = | 99 +++-- > {UefiCpuPkg =3D> OvmfPkg}/CpuS3DataDxe/CpuS3DataDxe.inf = = | 30 +- > 24 files changed, 1667 insertions(+), 89 deletions(-) > copy UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibN= ull.c =3D> OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQ= emu.c (61%) > copy UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibN= ull.inf =3D> OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLi= bQemu.inf (43%) > copy {UefiCpuPkg =3D> OvmfPkg}/CpuS3DataDxe/CpuS3Data.c (77%) > copy {UefiCpuPkg =3D> OvmfPkg}/CpuS3DataDxe/CpuS3DataDxe.inf (69%) > create mode 100644 OvmfPkg/CpuHotplugSmm/ApicId.h > create mode 100644 OvmfPkg/CpuHotplugSmm/CpuHotplug.c > create mode 100644 OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf > create mode 100644 OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm > create mode 100644 OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h > create mode 100644 OvmfPkg/CpuHotplugSmm/PostSmmPen.nasm > create mode 100644 OvmfPkg/CpuHotplugSmm/QemuCpuhp.c > create mode 100644 OvmfPkg/CpuHotplugSmm/QemuCpuhp.h > create mode 100644 OvmfPkg/CpuHotplugSmm/Smbase.c > create mode 100644 OvmfPkg/CpuHotplugSmm/Smbase.h > > > base-commit: 1d3215fd24f47eaa4877542a59b4bbf5afc0cfe8 > -- > 2.19.1.3.g30247aa5d201 >