From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by mx.groups.io with SMTP id smtpd.web12.320.1574956719249818716 for ; Thu, 28 Nov 2019 07:58:39 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=iCI3722V; spf=pass (domain: linaro.org, ip: 209.85.221.65, mailfrom: ard.biesheuvel@linaro.org) Received: by mail-wr1-f65.google.com with SMTP id b6so2104340wrq.0 for ; Thu, 28 Nov 2019 07:58:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=9ieBsg+sGxPlZJSlB8MQ2lgsIDtwznJtNZw1v/P1aJY=; b=iCI3722VPfmDxrb9tBTRIlcv9G751aUF6qUa2uNa2Oze7pqz/VelXUFJxD46gGT8w9 HjZ/eNKZfqiw+x581E36WcBeSydr1U0LypWr8QstlU6cszr4RDOJSr9zF8z+DwaQ5vvl nxNzrYWyp7JCDdoQMw5say7S7VLBiyNzWhxRM5hx0Q/0RhMUTVfSltuHnO2Xn23vByPB gG567lM7KLGuaQmz7eY/KuVLzexWZnNNAiY94Fmq+UKnKcE6ldec1JneK5EJN8SFJzy5 GfQXGBKCOOLoOpKz7NoldmWbCb8KYBswYdDvINU+exVwcn/1gjUgE19r4C4EL/AiAVnF 5j+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=9ieBsg+sGxPlZJSlB8MQ2lgsIDtwznJtNZw1v/P1aJY=; b=oho5ZlIwYCnozg9iK5noUiSZlqjpeOjaEl5lhM85r4DzPgUXc3vLYr+Fi7+/+Thi/W eh2Vy/zgN6m882C8lukCbiCuCy0yoFfaw6+2nqJdUYzI0kOAs5FYx8MAd1fCVtrvVNWM WdHswrvHWdsXanEzJ2rz68CA8bUc/5lXc/7CLpesCQOXB1ZlFRbrnDfF9nE39XHpXxDS e+MdZmyWNaI5BZSjwTziSb7odQjU0l0EeuzS5U4Xdr8qjXoUdfCa2Lpln5OZCZo7jKYX QZGyvsY9BCimCeu2P57Wj9yW20hFiDgv2YUr6Xojz5BVYiYJT7bqGvN2VioG0oXuFXro ye0g== X-Gm-Message-State: APjAAAXoyXzc0gDOtXNjxXU8GspzzcQGUql5DBNAn7QDQkC3eyT1gYmP yDwnDup0r6U6p6KKA5RcS7Iaf0dg4oH8a9LBcSAtfvkFu/o= X-Google-Smtp-Source: APXvYqzsqRzdCazIOh/gAuiriNQ7wB6GjuTFXaDPUN7LhWFWnL8BJA1TegOW+yxJCutfd3wKTd3mVnukZiFt0ksBFjo= X-Received: by 2002:a5d:6652:: with SMTP id f18mr7456824wrw.246.1574956717634; Thu, 28 Nov 2019 07:58:37 -0800 (PST) MIME-Version: 1.0 References: <20191128144840.25654-1-ard.biesheuvel@linaro.org> <20191128145614.GT7359@bivouac.eciton.net> <20191128151940.GV7359@bivouac.eciton.net> In-Reply-To: <20191128151940.GV7359@bivouac.eciton.net> From: "Ard Biesheuvel" Date: Thu, 28 Nov 2019 16:58:26 +0100 Message-ID: Subject: Re: [PATCH edk2-platforms 1/2] Silicon/SynQuacer/PlatformDxe: set NETSEC DMA as coherent To: Leif Lindholm Cc: edk2-devel-groups-io Content-Type: text/plain; charset="UTF-8" On Thu, 28 Nov 2019 at 16:19, Leif Lindholm wrote: > > On Thu, Nov 28, 2019 at 15:59:14 +0100, Ard Biesheuvel wrote: > > On Thu, 28 Nov 2019 at 15:56, Leif Lindholm wrote: > > > > > > On Thu, Nov 28, 2019 at 15:48:39 +0100, Ard Biesheuvel wrote: > > > > We switched to cache coherent DMA for the NETSEC network controller ages > > > > ago, but the platform driver that registers the non-discoverable device > > > > currently does not reflect this change, which we haven't noticed since > > > > the driver doesn't look at this flag. > > > > > > Should the drive look at this flag? > > > > > > > The driver links against DmaLib, so it is either built for coherent > > DMA only, or for non-coherent DMA only. This is different from the > > eMMC on this platform, since it uses NonDiscoverablePciDeviceDxe, > > which implements support for both coherent and non-coherent DMA in the > > same driver, so there it has to be accurate or things break. For > > NETSEC, we could add a check I suppose, but it is certainly not a high > > prio thing imo. > > Ah, fair enough. > Thanks for the explanation. > Series pushed as 6bde2876c3aa..8e75ee0c9653 Thanks,