From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Evan Lloyd <evan.lloyd@arm.com>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
Arvind Chauhan <Arvind.Chauhan@arm.com>,
Daniil Egranov <Daniil.Egranov@arm.com>,
Thomas Panakamattam Abraham <thomas.abraham@arm.com>,
<"ard.biesheuvel@linaro.org"@arm.com>,
<"leif.lindholm@linaro.org"@arm.com>,
<"Matteo.Carlini@arm.com"@arm.com>, <"nd@arm.com"@arm.com>
Subject: Re: [PATCH edk2-platforms v2 02/18] ARM/VExpressPkg: Tidy HDLCD and PL11LCD platform Lib: Coding standard
Date: Sat, 23 Dec 2017 14:07:57 +0000 [thread overview]
Message-ID: <CAKv+Gu-bwFWJVeo7ESN3xrzeW_5t3564gfwdu2i6so62szcnWw@mail.gmail.com> (raw)
In-Reply-To: <20171222190821.12440-3-evan.lloyd@arm.com>
On 22 December 2017 at 19:08, <evan.lloyd@arm.com> wrote:
> From: Girish Pathak <girish.pathak at arm.com>
>
> There is no functional modification in this change
> As preparation for further work, the formatting is corrected to meet
> the EDKII coding standard.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Girish Pathak <girish.pathak@arm.com>
> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf | 5 +-
> Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c | 136 ++++++-----
> Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c | 238 +++++++++++---------
> 3 files changed, 218 insertions(+), 161 deletions(-)
>
> diff --git a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
> index 18d210ce718db45e018681cd1ccdad48f4adc7f3..d44aa7776a4ac60d60f3b4386e67c53423287383 100644
> --- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
> +++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
> @@ -1,6 +1,6 @@
> #/** @file
> #
> -# Component description file for HdLcdArmLib module
> +# Component description file for HdLcdArmVExpress module
> #
> # Copyright (c) 2011-2017, ARM Ltd. All rights reserved.<BR>
> #
> @@ -23,8 +23,7 @@ [Defines]
> LIBRARY_CLASS = LcdPlatformLib
>
> [Sources.common]
> -
> -HdLcdArmVExpress.c
> + HdLcdArmVExpress.c
>
> [Packages]
> ArmPlatformPkg/ArmPlatformPkg.dec
> diff --git a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
> index b1106ee19b98cebac01820924514eac79b97d0d5..851ba83b79f0fea7019269c30e7add58f5ff9cb2 100644
> --- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
> +++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
> @@ -1,6 +1,6 @@
> -/**
> +/** @file
>
> - Copyright (c) 2012, ARM Ltd. All rights reserved.
> + Copyright (c) 2012-2017, ARM Ltd. All rights reserved.
>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD License
> @@ -44,35 +44,40 @@ typedef struct {
> UINT32 VFrontPorch;
> } LCD_RESOLUTION;
>
> -
> LCD_RESOLUTION mResolutions[] = {
> { // Mode 0 : VGA : 640 x 480 x 24 bpp
> - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,
> + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + VGA_OSC_FREQUENCY,
> VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> },
> { // Mode 1 : SVGA : 800 x 600 x 24 bpp
> - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,
> + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + SVGA_OSC_FREQUENCY,
> SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> },
> { // Mode 2 : XGA : 1024 x 768 x 24 bpp
> - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,
> + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + XGA_OSC_FREQUENCY,
> XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> },
> { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
> - SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),
> + SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + (SXGA_OSC_FREQUENCY/2),
> SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
> SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
> },
> { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
> - UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),
> + UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + (UXGA_OSC_FREQUENCY/2),
> UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
> UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
> },
> { // Mode 5 : HD : 1920 x 1080 x 24 bpp
> - HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),
> + HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + (HD_OSC_FREQUENCY/2),
> HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
> HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
> }
> @@ -95,19 +100,25 @@ LcdPlatformInitializeDisplay (
> {
> EFI_STATUS Status;
>
> - // Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard
> - Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, ARM_VE_DAUGHTERBOARD_1_SITE);
> - if (EFI_ERROR(Status)) {
> + // Set the FPGA multiplexer to select the video output from the
> + // motherboard or the daughterboard
> + Status = ArmPlatformSysConfigSet (
> + SYS_CFG_MUXFPGA,
> + ARM_VE_DAUGHTERBOARD_1_SITE
> + );
> + if (EFI_ERROR (Status)) {
> return Status;
> }
>
> // Install the EDID Protocols
> Status = gBS->InstallMultipleProtocolInterfaces (
> - &Handle,
> - &gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered,
> - &gEfiEdidActiveProtocolGuid, &mEdidActive,
> - NULL
> - );
> + &Handle,
> + &gEfiEdidDiscoveredProtocolGuid,
> + &mEdidDiscovered,
> + &gEfiEdidActiveProtocolGuid,
> + &mEdidActive,
> + NULL
> + );
>
> return Status;
> }
> @@ -132,16 +143,25 @@ LcdPlatformGetVram (
> } else {
> AllocationType = AllocateAddress;
> }
> - Status = gBS->AllocatePages (AllocationType, EfiBootServicesData, EFI_SIZE_TO_PAGES(((UINTN)LCD_VRAM_SIZE)), VramBaseAddress);
> - if (EFI_ERROR(Status)) {
> + Status = gBS->AllocatePages (
> + AllocationType,
> + EfiBootServicesData,
> + EFI_SIZE_TO_PAGES (((UINTN)LCD_VRAM_SIZE)),
> + VramBaseAddress
> + );
> + if (EFI_ERROR (Status)) {
> return Status;
> }
>
> - // Mark the VRAM as write-combining. The VRAM is inside the DRAM, which is cacheable.
> - Status = gDS->SetMemorySpaceAttributes (*VramBaseAddress, *VramSize,
> - EFI_MEMORY_WC);
> - ASSERT_EFI_ERROR(Status);
> - if (EFI_ERROR(Status)) {
> + // Mark the VRAM as write-combining.
> + // The VRAM is inside the DRAM, which is cacheable.
> + Status = gDS->SetMemorySpaceAttributes (
> + *VramBaseAddress,
> + *VramSize,
> + EFI_MEMORY_WC
> + );
> + ASSERT_EFI_ERROR (Status);
> + if (EFI_ERROR (Status)) {
> gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize));
> return Status;
> }
> @@ -150,15 +170,11 @@ LcdPlatformGetVram (
> }
>
> UINT32
> -LcdPlatformGetMaxMode (
> - VOID
> - )
> +LcdPlatformGetMaxMode (VOID)
> {
> - //
> // The following line will report correctly the total number of graphics modes
> - // that could be supported by the graphics driver:
> - //
> - return (sizeof(mResolutions) / sizeof(LCD_RESOLUTION));
> + // that could be supported by the graphics driver
> + return (sizeof (mResolutions) / sizeof (LCD_RESOLUTION));
> }
>
> EFI_STATUS
> @@ -174,25 +190,35 @@ LcdPlatformSetMode (
>
> // Set the video mode oscillator
> do {
> - Status = ArmPlatformSysConfigSetDevice (SYS_CFG_OSC_SITE1, PcdGet32(PcdHdLcdVideoModeOscId), mResolutions[ModeNumber].OscFreq);
> + Status = ArmPlatformSysConfigSetDevice (
> + SYS_CFG_OSC_SITE1,
> + PcdGet32 (PcdHdLcdVideoModeOscId),
> + mResolutions[ModeNumber].OscFreq
> + );
> } while (Status == EFI_TIMEOUT);
> - if (EFI_ERROR(Status)) {
> + if (EFI_ERROR (Status)) {
> ASSERT_EFI_ERROR (Status);
> return Status;
> }
>
> // Set the DVI into the new mode
> do {
> - Status = ArmPlatformSysConfigSet (SYS_CFG_DVIMODE, mResolutions[ModeNumber].Mode);
> + Status = ArmPlatformSysConfigSet (
> + SYS_CFG_DVIMODE,
> + mResolutions[ModeNumber].Mode
> + );
> } while (Status == EFI_TIMEOUT);
> - if (EFI_ERROR(Status)) {
> + if (EFI_ERROR (Status)) {
> ASSERT_EFI_ERROR (Status);
> return Status;
> }
>
> // Set the multiplexer
> - Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, ARM_VE_DAUGHTERBOARD_1_SITE);
> - if (EFI_ERROR(Status)) {
> + Status = ArmPlatformSysConfigSet (
> + SYS_CFG_MUXFPGA,
> + ARM_VE_DAUGHTERBOARD_1_SITE
> + );
> + if (EFI_ERROR (Status)) {
> ASSERT_EFI_ERROR (Status);
> return Status;
> }
> @@ -216,25 +242,25 @@ LcdPlatformQueryMode (
> Info->PixelsPerScanLine = mResolutions[ModeNumber].HorizontalResolution;
>
> switch (mResolutions[ModeNumber].Bpp) {
> - case LCD_BITS_PER_PIXEL_24:
> - Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
> - Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK;
> - Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK;
> - Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
> - Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
> - break;
> + case LCD_BITS_PER_PIXEL_24:
> + Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
> + Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK;
> + Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK;
> + Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
> + Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
> + break;
>
> - case LCD_BITS_PER_PIXEL_16_555:
> - case LCD_BITS_PER_PIXEL_16_565:
> - case LCD_BITS_PER_PIXEL_12_444:
> - case LCD_BITS_PER_PIXEL_8:
> - case LCD_BITS_PER_PIXEL_4:
> - case LCD_BITS_PER_PIXEL_2:
> - case LCD_BITS_PER_PIXEL_1:
> - default:
> - // These are not supported
> - ASSERT(FALSE);
> - break;
> + case LCD_BITS_PER_PIXEL_16_555:
> + case LCD_BITS_PER_PIXEL_16_565:
> + case LCD_BITS_PER_PIXEL_12_444:
> + case LCD_BITS_PER_PIXEL_8:
> + case LCD_BITS_PER_PIXEL_4:
> + case LCD_BITS_PER_PIXEL_2:
> + case LCD_BITS_PER_PIXEL_1:
> + default:
> + // These are not supported
> + ASSERT (FALSE);
> + break;
> }
>
> return EFI_SUCCESS;
> diff --git a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
> index 3f3ceb3d2fa82f614e0c6dac8455c117745cf3a6..2586a6d8c2076c9aff15f50d652e462d783f13dc 100644
> --- a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
> +++ b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2011-2015, ARM Ltd. All rights reserved.<BR>
> + Copyright (c) 2011-2017, ARM Ltd. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD License
> which accompanies this distribution. The full text of the license may be found at
> @@ -41,87 +41,102 @@ typedef struct {
> UINT32 VFrontPorch;
> } LCD_RESOLUTION;
>
> -
> LCD_RESOLUTION mResolutions[] = {
> { // Mode 0 : VGA : 640 x 480 x 24 bpp
> - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,
> - VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> - VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + VGA_OSC_FREQUENCY,
> + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> },
> { // Mode 1 : SVGA : 800 x 600 x 24 bpp
> - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,
> - SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> - SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + SVGA_OSC_FREQUENCY,
> + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> },
> { // Mode 2 : XGA : 1024 x 768 x 24 bpp
> - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,
> - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + XGA_OSC_FREQUENCY,
> + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> },
> { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
> - SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),
> - SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
> - SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
> + SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + (SXGA_OSC_FREQUENCY/2),
> + SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
> + SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
> },
> { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
> - UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),
> - UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
> - UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
> + UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + (UXGA_OSC_FREQUENCY/2),
> + UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
> + UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
> },
> { // Mode 5 : HD : 1920 x 1080 x 24 bpp
> - HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),
> - HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
> - HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
> + HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
> + (HD_OSC_FREQUENCY/2),
> + HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
> + HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
> },
> { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)
> - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY,
> - VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> - VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565,
> + VGA_OSC_FREQUENCY,
> + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> },
> { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)
> - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY,
> - SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> - SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565,
> + SVGA_OSC_FREQUENCY,
> + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> },
> { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)
> - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY,
> - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565,
> + XGA_OSC_FREQUENCY,
> + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> },
> { // Mode 9 : VGA : 640 x 480 x 15 bpp
> - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY,
> - VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> - VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555,
> + VGA_OSC_FREQUENCY,
> + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> },
> { // Mode 10 : SVGA : 800 x 600 x 15 bpp
> - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY,
> - SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> - SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555,
> + SVGA_OSC_FREQUENCY,
> + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> },
> { // Mode 11 : XGA : 1024 x 768 x 15 bpp
> - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY,
> - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555,
> + XGA_OSC_FREQUENCY,
> + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> },
> { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings
> - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000,
> - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555,
> + 63500000,
> + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> },
> { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)
> - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY,
> - VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> - VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444,
> + VGA_OSC_FREQUENCY,
> + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
> + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
> },
> { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)
> - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY,
> - SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> - SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444,
> + SVGA_OSC_FREQUENCY,
> + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
> + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
> },
> { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)
> - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY,
> - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444,
> + XGA_OSC_FREQUENCY,
> + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
> + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
> }
> };
>
> @@ -135,7 +150,6 @@ EFI_EDID_ACTIVE_PROTOCOL mEdidActive = {
> NULL
> };
>
> -
> EFI_STATUS
> LcdPlatformInitializeDisplay (
> IN EFI_HANDLE Handle
> @@ -143,16 +157,19 @@ LcdPlatformInitializeDisplay (
> {
> EFI_STATUS Status;
>
> - // Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard
> + // Set the FPGA multiplexer to select the video output from the motherboard
> + // or the daughterboard
> Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);
> - if (!EFI_ERROR(Status)) {
> + if (!EFI_ERROR (Status)) {
> // Install the EDID Protocols
> - Status = gBS->InstallMultipleProtocolInterfaces(
> - &Handle,
> - &gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered,
> - &gEfiEdidActiveProtocolGuid, &mEdidActive,
> - NULL
> - );
> + Status = gBS->InstallMultipleProtocolInterfaces (
> + &Handle,
> + &gEfiEdidDiscoveredProtocolGuid,
> + &mEdidDiscovered,
> + &gEfiEdidActiveProtocolGuid,
> + &mEdidActive,
> + NULL
> + );
> }
>
> return Status;
> @@ -169,29 +186,38 @@ LcdPlatformGetVram (
> Status = EFI_SUCCESS;
>
> // Is it on the motherboard or on the daughterboard?
> - switch(PL111_CLCD_SITE) {
> + switch (PL111_CLCD_SITE) {
>
> case ARM_VE_MOTHERBOARD_SITE:
> - *VramBaseAddress = (EFI_PHYSICAL_ADDRESS) PL111_CLCD_VRAM_MOTHERBOARD_BASE;
> + *VramBaseAddress = (EFI_PHYSICAL_ADDRESS)PL111_CLCD_VRAM_MOTHERBOARD_BASE;
> *VramSize = LCD_VRAM_SIZE;
> break;
>
> case ARM_VE_DAUGHTERBOARD_1_SITE:
> - *VramBaseAddress = (EFI_PHYSICAL_ADDRESS) LCD_VRAM_CORE_TILE_BASE;
> + *VramBaseAddress = (EFI_PHYSICAL_ADDRESS)LCD_VRAM_CORE_TILE_BASE;
> *VramSize = LCD_VRAM_SIZE;
>
> // Allocate the VRAM from the DRAM so that nobody else uses it.
> - Status = gBS->AllocatePages( AllocateAddress, EfiBootServicesData, EFI_SIZE_TO_PAGES(((UINTN)LCD_VRAM_SIZE)), VramBaseAddress);
> - if (EFI_ERROR(Status)) {
> + Status = gBS->AllocatePages (
> + AllocateAddress,
> + EfiBootServicesData,
> + EFI_SIZE_TO_PAGES (((UINTN)LCD_VRAM_SIZE)),
> + VramBaseAddress
> + );
> + if (EFI_ERROR (Status)) {
> return Status;
> }
>
> - // Mark the VRAM as write-combining. The VRAM is inside the DRAM, which is cacheable.
> - Status = gDS->SetMemorySpaceAttributes (*VramBaseAddress, *VramSize,
> - EFI_MEMORY_WC);
> - ASSERT_EFI_ERROR(Status);
> - if (EFI_ERROR(Status)) {
> - gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES(*VramSize));
> + // Mark the VRAM as write-combining.
> + // The VRAM is inside the DRAM, which is cacheable.
> + Status = gDS->SetMemorySpaceAttributes (
> + *VramBaseAddress,
> + *VramSize,
> + EFI_MEMORY_WC
> + );
> + ASSERT_EFI_ERROR (Status);
> + if (EFI_ERROR (Status)) {
> + gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize));
> return Status;
> }
> break;
> @@ -206,19 +232,18 @@ LcdPlatformGetVram (
> }
>
> UINT32
> -LcdPlatformGetMaxMode (
> - VOID
> - )
> +LcdPlatformGetMaxMode (VOID)
> {
> - // The following line will report correctly the total number of graphics modes
> - // supported by the PL111CLCD.
> - //return (sizeof(mResolutions) / sizeof(CLCD_RESOLUTION)) - 1;
> + // The following line would correctly report the total number
> + // of graphics modes supported by the PL111CLCD.
> + // return (sizeof(mResolutions) / sizeof(CLCD_RESOLUTION)) - 1;
>
> // However, on some platforms it is desirable to ignore some graphics modes.
> - // This could be because the specific implementation of PL111 has certain limitations.
> + // This could be because the specific implementation of PL111 has
> + // certain limitations.
>
> // Set the maximum mode allowed
> - return (PcdGet32(PcdPL111LcdMaxMode));
> + return (PcdGet32 (PcdPL111LcdMaxMode));
> }
>
> EFI_STATUS
> @@ -238,22 +263,26 @@ LcdPlatformSetMode (
>
> LcdSite = PL111_CLCD_SITE;
>
> - switch(LcdSite) {
> + switch (LcdSite) {
> case ARM_VE_MOTHERBOARD_SITE:
> Function = SYS_CFG_OSC;
> OscillatorId = PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID;
> break;
> case ARM_VE_DAUGHTERBOARD_1_SITE:
> Function = SYS_CFG_OSC_SITE1;
> - OscillatorId = (UINT32)PcdGet32(PcdPL111LcdVideoModeOscId);
> + OscillatorId = (UINT32)PcdGet32 (PcdPL111LcdVideoModeOscId);
> break;
> default:
> return EFI_UNSUPPORTED;
> }
>
> // Set the video mode oscillator
> - Status = ArmPlatformSysConfigSetDevice (Function, OscillatorId, mResolutions[ModeNumber].OscFreq);
> - if (EFI_ERROR(Status)) {
> + Status = ArmPlatformSysConfigSetDevice (
> + Function,
> + OscillatorId,
> + mResolutions[ModeNumber].OscFreq
> + );
> + if (EFI_ERROR (Status)) {
> ASSERT_EFI_ERROR (Status);
> return Status;
> }
> @@ -267,8 +296,11 @@ LcdPlatformSetMode (
> SysId &= ~ARM_FVP_SYS_ID_VARIANT_MASK;
> if (SysId != ARM_FVP_BASE_BOARD_SYS_ID) {
> // Set the DVI into the new mode
> - Status = ArmPlatformSysConfigSet (SYS_CFG_DVIMODE, mResolutions[ModeNumber].Mode);
> - if (EFI_ERROR(Status)) {
> + Status = ArmPlatformSysConfigSet (
> + SYS_CFG_DVIMODE,
> + mResolutions[ModeNumber].Mode
> + );
> + if (EFI_ERROR (Status)) {
> ASSERT_EFI_ERROR (Status);
> return Status;
> }
> @@ -277,7 +309,7 @@ LcdPlatformSetMode (
>
> // Set the multiplexer
> Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, LcdSite);
> - if (EFI_ERROR(Status)) {
> + if (EFI_ERROR (Status)) {
> ASSERT_EFI_ERROR (Status);
> return Status;
> }
> @@ -301,25 +333,25 @@ LcdPlatformQueryMode (
> Info->PixelsPerScanLine = mResolutions[ModeNumber].HorizontalResolution;
>
> switch (mResolutions[ModeNumber].Bpp) {
> - case LCD_BITS_PER_PIXEL_24:
> - Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
> - Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK;
> - Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK;
> - Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
> - Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
> - break;
> + case LCD_BITS_PER_PIXEL_24:
> + Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
> + Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK;
> + Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK;
> + Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
> + Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
> + break;
>
> - case LCD_BITS_PER_PIXEL_16_555:
> - case LCD_BITS_PER_PIXEL_16_565:
> - case LCD_BITS_PER_PIXEL_12_444:
> - case LCD_BITS_PER_PIXEL_8:
> - case LCD_BITS_PER_PIXEL_4:
> - case LCD_BITS_PER_PIXEL_2:
> - case LCD_BITS_PER_PIXEL_1:
> - default:
> - // These are not supported
> - ASSERT(FALSE);
> - break;
> + case LCD_BITS_PER_PIXEL_16_555:
> + case LCD_BITS_PER_PIXEL_16_565:
> + case LCD_BITS_PER_PIXEL_12_444:
> + case LCD_BITS_PER_PIXEL_8:
> + case LCD_BITS_PER_PIXEL_4:
> + case LCD_BITS_PER_PIXEL_2:
> + case LCD_BITS_PER_PIXEL_1:
> + default:
> + // These are not supported
> + ASSERT (FALSE);
> + break;
> }
>
> return EFI_SUCCESS;
> --
> Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")
>
next prev parent reply other threads:[~2017-12-23 14:03 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-22 19:08 [PATCH edk2-platforms v2 00/18] ARM: Update GOP evan.lloyd
2017-12-22 19:08 ` [PATCH edk2-platforms v2 01/18] ARM/VExpressPkg: Fix MODULE_TYPE of HDLCD/PL111 platform libraries evan.lloyd
2017-12-22 19:08 ` [PATCH edk2-platforms v2 02/18] ARM/VExpressPkg: Tidy HDLCD and PL11LCD platform Lib: Coding standard evan.lloyd
2017-12-23 14:07 ` Ard Biesheuvel [this message]
2017-12-22 19:08 ` [PATCH edk2-platforms v2 03/18] ARM/VExpressPkg: Tidy HdLcd/PL111Lcd code: Updated comments evan.lloyd
2017-12-23 14:08 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 04/18] ARM/VExpressPkg: Remove unused PcdPL111LcdMaxMode from HDLCD inf evan.lloyd
2017-12-23 14:08 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 05/18] ARM/VExpressPkg: PL111 and HDLCD: add const qualifier evan.lloyd
2017-12-23 14:09 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 06/18] ARM/VExpressPkg: Add and update debug ASSERTS evan.lloyd
2017-12-23 14:12 ` Ard Biesheuvel
2018-01-04 18:55 ` Girish Pathak
2018-01-04 19:24 ` Ard Biesheuvel
2018-01-04 19:51 ` Evan Lloyd
2018-01-04 19:54 ` Ard Biesheuvel
2018-02-28 20:27 ` Evan Lloyd
2018-03-02 19:07 ` Ard Biesheuvel
2018-03-05 15:08 ` Evan Lloyd
2018-03-06 11:16 ` Ard Biesheuvel
2018-03-14 12:24 ` Leif Lindholm
2018-03-14 12:35 ` Ard Biesheuvel
2018-03-14 12:39 ` Leif Lindholm
2017-12-22 19:08 ` [PATCH edk2-platforms v2 07/18] ARM/VExpressPkg: PL111LcdArmVExpressLib: Minor code cleanup evan.lloyd
2017-12-23 14:13 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 08/18] ARM/VExpressPkg: PL111 and HDLCD: Use FixedPcdGet32 evan.lloyd
2017-12-23 14:14 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 09/18] ARM/VExpressPkg: PL11LcdArmVExpressLib: Improvement conditional evan.lloyd
2017-12-23 14:16 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 10/18] ARM/VExpressPkg: HdLcdArmVExpressLib: Remove status check EFI_TIMEOUT evan.lloyd
2017-12-23 14:16 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 11/18] ARM/VExpressPkg: HdLcdArmVExpressLib: Remove redundant Bpp evan.lloyd
2017-12-23 14:17 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 12/18] ARM/VExpressPkg: Redefine LcdPlatformGetTimings function evan.lloyd
2017-12-23 14:18 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 13/18] ARM/VExpressPkg: PL111 and HDLCD: Add PCD to select pixel format evan.lloyd
2017-12-23 16:00 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 14/18] ARM/VExpressPkg: Reserving framebuffer at build evan.lloyd
2017-12-23 16:02 ` Ard Biesheuvel
2018-01-03 11:04 ` Evan Lloyd
2017-12-22 19:08 ` [PATCH edk2-platforms v2 15/18] ARM/VExpressPkg: New DP500/DP550/DP650 platform library evan.lloyd
2017-12-23 16:07 ` Ard Biesheuvel
2018-01-08 18:51 ` Evan Lloyd
2018-01-24 11:27 ` Alexei Fedorov
2018-01-24 11:34 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 16/18] ARM/JunoPkg: Mapping Non-Trused SRAM as device memory evan.lloyd
2017-12-23 16:08 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 17/18] ARM/JunoPkg: Adding SCMI MTL library evan.lloyd
2017-12-23 16:12 ` Ard Biesheuvel
2017-12-22 19:08 ` [PATCH edk2-platforms v2 18/18] ARM/JunoPkg: Add HDLCD platform library evan.lloyd
2017-12-23 16:22 ` Ard Biesheuvel
2018-01-09 18:21 ` Evan Lloyd
2018-01-09 18:26 ` Ard Biesheuvel
2018-01-10 11:45 ` Alexei Fedorov
2018-01-10 12:02 ` Ard Biesheuvel
2017-12-22 19:29 ` [PATCH edk2-platforms v2 00/18] ARM: Update GOP Ard Biesheuvel
2018-01-02 10:28 ` Evan Lloyd
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