From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Achin Gupta <achin.gupta@arm.com>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
Leif Lindholm <leif.lindholm@linaro.org>,
nd@arm.com
Subject: Re: [PATCH] ArmPlatformPkg/ArmVExpressPkg: Fix memory attributes for NOR Flash
Date: Wed, 18 Jan 2017 20:56:04 +0000 [thread overview]
Message-ID: <CAKv+Gu-fjxC9zfMmyp-rzgavNO_JPd+Qp47LtX3xW+GewnazPA@mail.gmail.com> (raw)
In-Reply-To: <1484771046-21296-1-git-send-email-achin.gupta@arm.com>
On 18 January 2017 at 20:24, <achin.gupta@arm.com> wrote:
> From: Achin Gupta <achin.gupta@arm.com>
>
> The NOR flash banks were being mapped in the translation tables with the same
> memory attributes as RAM in the system. These attributes mark the region as
> Normal Memory and could additionally be cacheable or non-cacheable.
>
> Either type of attributes are unsuitable for NOR Flash since write operations
> could be performed on it. Normal Memory does not guarantee ordering of
> transactions that Device memory does. So the commands sent to the Flash device
> may not arrive in the right order unless barriers are used. Commands might not
> get past the CPU caches in case the region has been mapped with cacheable
> attributes.
>
> This patch fixes the problem by mapping the NOR Flash memory region with Device
> memory attributes.
>
Device attributes should imply NX, which means we can no longer
execute from the NOR flash
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Achin Gupta <achin.gupta@arm.com>
> ---
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
> index 14c7e8e..2685114 100644
> --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
> +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
> @@ -116,7 +116,7 @@ ArmPlatformGetVirtualMemoryMap (
> VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
> VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;
> VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;
> - VirtualMemoryTable[Index].Attributes = CacheAttributes;
> + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>
> // SMB CS2 - SRAM
> VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
> --
> 1.9.1
>
next prev parent reply other threads:[~2017-01-18 20:56 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-18 20:24 [PATCH] ArmPlatformPkg/ArmVExpressPkg: Fix memory attributes for NOR Flash achin.gupta
2017-01-18 20:56 ` Ard Biesheuvel [this message]
2017-01-18 22:05 ` Leif Lindholm
2017-01-18 22:26 ` Supreeth Venkatesh
2017-01-19 12:31 ` Achin Gupta
2017-01-19 18:16 ` Ard Biesheuvel
2017-01-19 21:57 ` Achin Gupta
2017-01-19 22:01 ` Ard Biesheuvel
2017-01-20 11:15 ` Achin Gupta
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