From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x231.google.com (mail-io0-x231.google.com [IPv6:2607:f8b0:4001:c06::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D3AF321A18AAB for ; Tue, 18 Apr 2017 10:56:54 -0700 (PDT) Received: by mail-io0-x231.google.com with SMTP id o22so6279859iod.3 for ; Tue, 18 Apr 2017 10:56:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=PGWu99VnHNEohgLWwFIS/CULddqpPLA04ksKY9UdSmo=; b=U2q/91pgfEnX+LWdyMF5QDTU00H8otQYo5IEqWvuaFrWHB6u4tK29qY36bVJzEZc0x sMwgLqPGighp3pXC//TxIghBfPu1lF3/bxSHkpLbl+G68Kkli2VfgrTgX7z6tX7cA2Js Lo4COkfPNazrr/ZzVIiiRdhNFNk1YHyzmxVXI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=PGWu99VnHNEohgLWwFIS/CULddqpPLA04ksKY9UdSmo=; b=nxX2OgPzYRozmSN6NLtksYfUyeyA+W/WAJ+c/0bGJsxCQe7jlHrsE3i0XEH9G7PY73 pRMEc3L5QHlQeKvI15XYKMyhQHwHwO/WjTDBFTBkbjRTXn5mNtcLG8gnt/pjOsll+XrM qtzrUFDSRkojlkz9LJEkM8XXgcXEg2OwYCK4jMg56DUc0ZC57b+SK4VwIIUYwzIywGjX GQyCs2H822aRNvYTSPZbe2VOf1uIjNRrv0AWw2WF9HQJy0kV+ioJjb3F9c/onRmQCrRZ y9NdFL2bGdvNorJlxs4V/fZcXb5yOaDWHKNx3DuJwB7PuaPSoxFJuW5sfth3nG+EK7EB 0cgA== X-Gm-Message-State: AN3rC/50rMgjtGw5+sOkFdjJU4uvKcTRv1hN1RZReGemUx9tqSb7WtD9 jprYvx2BPnKocnjxAP6+L+vyczvBWQi8 X-Received: by 10.107.186.134 with SMTP id k128mr13962655iof.83.1492538214123; Tue, 18 Apr 2017 10:56:54 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.201.76 with HTTP; Tue, 18 Apr 2017 10:56:53 -0700 (PDT) In-Reply-To: <20170413163705.26316-1-ard.biesheuvel@linaro.org> References: <20170413163705.26316-1-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Tue, 18 Apr 2017 18:56:53 +0100 Message-ID: To: "edk2-devel@lists.01.org" , Leif Lindholm , "Kinney, Michael D" , "Gao, Liming" Cc: Lorenzo Pieralisi , Ard Biesheuvel Subject: Re: [PATCH] MdePkg/IndustryStandard: add definitions for ACPI 6.0 IORT X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Apr 2017 17:56:55 -0000 Content-Type: text/plain; charset=UTF-8 On 13 April 2017 at 17:37, Ard Biesheuvel wrote: > This adds #defines and struct typedefs for the various node types in > the ACPI 6.0 IO Remapping Table (IORT). > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > MdePkg/Include/IndustryStandard/IoRemappingTable.h | 187 ++++++++++++++++++++ > 1 file changed, 187 insertions(+) > Liming, Michael, Are there any concerns with this patch? Thanks, Ard. > diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h > new file mode 100644 > index 000000000000..674cb611961d > --- /dev/null > +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h > @@ -0,0 +1,187 @@ > +/** @file > + ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049B > + > + Copyright (c) 2017, Linaro Limited. All rights reserved.
> + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD License > + which accompanies this distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +**/ > + > +#ifndef __IO_REMAPPING_TABLE_H__ > +#define __IO_REMAPPING_TABLE_H__ > + > +#include > + > +#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0 > + > +#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0 > +#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1 > +#define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2 > +#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3 > +#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4 > + > +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0 > + > +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0 > +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1 > +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2 > +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3 > + > +#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0 > +#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1 > + > +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0 > +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1 > +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2 > +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3 > + > +#define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0 > +#define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1 > + > +#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0 > +#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1 > + > +#define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0 > +#define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1 > + > +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0 > +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1 > + > +#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0 > + > +#pragma pack(1) > + > +// > +// Table header > +// > +typedef struct { > + EFI_ACPI_DESCRIPTION_HEADER Header; > + INT32 NumNodes; > + INT32 NodeOffset; > + INT32 Reserved; > +} EFI_ACPI_6_0_IO_REMAPPING_TABLE; > + > +// > +// Definition for ID mapping table shared by all node types > +// > +typedef struct { > + UINT32 InputBase; > + UINT32 NumIds; > + UINT32 OutputBase; > + UINT32 OutputReference; > + UINT32 Flags; > +} EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE; > + > +// > +// Header definition shared by all node types > +// > +typedef struct { > + UINT8 Type; > + UINT16 Length; > + UINT8 Revision; > + UINT32 Reserved; > + UINT32 NumIdMappings; > + UINT32 IdReference; > +} EFI_ACPI_6_0_IO_REMAPPING_NODE; > + > +// > +// Node type 0: ITS node > +// > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; > + > + UINT32 NumIts; > +/* > + UINT32 ItsIdentifiers[0]; > +*/ > +} EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; > + > +// > +// Node type 1: root complex node > +// > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; > + > + UINT32 CacheCoherent; > + UINT8 AllocationHints; > + UINT16 Reserved; > + UINT8 MemoryAccessFlags; > + > + UINT32 AtsAttribute; > + UINT32 PciSegmentNumber; > +} EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; > + > +// > +// Node type 2: named component node > +// > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; > + > + UINT32 Flags; > + UINT32 CacheCoherent; > + UINT8 AllocationHints; > + UINT16 Reserved; > + UINT8 MemoryAccessFlags; > + UINT8 AddressSizeLimit; > +/* > + CHAR8 ObjectName[0]; > +*/ > +} EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE; > + > +// > +// Node type 3: SMMUv1 or SMMUv2 node > +// > +typedef struct { > + UINT32 Interrupt; > + UINT32 InterruptFlags; > +} EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT; > + > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; > + > + UINT64 Base; > + UINT64 Span; > + UINT32 Model; > + UINT32 Flags; > + UINT32 GlobalInterruptArrayRef; > + UINT32 NumContextInterrupts; > + UINT32 ContextInterruptArrayRef; > + UINT32 NumPmuInterrupts; > + UINT32 PmuInterruptArrayRef; > + > + UINT32 SMMU_NSgIrpt; > + UINT32 SMMU_NSgIrptFlags; > + UINT32 SMMU_NSgCfgIrpt; > + UINT32 SMMU_NSgCfgIrptFlags; > + > +/* > + EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[0]; > + EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[0]; > +*/ > +} EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE; > + > +// > +// Node type 4: SMMUv4 node > +// > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; > + > + UINT64 Base; > + UINT32 Flags; > + UINT32 Reserved; > + UINT64 VatosAddress; > + UINT32 Model; > + UINT32 Event; > + UINT32 Pri; > + UINT32 Gerr; > + UINT32 Sync; > +} EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; > + > +#pragma pack() > + > +#endif > -- > 2.9.3 >