From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x22d.google.com (mail-io0-x22d.google.com [IPv6:2607:f8b0:4001:c06::22d]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5972A21A143F1 for ; Mon, 26 Jun 2017 09:55:12 -0700 (PDT) Received: by mail-io0-x22d.google.com with SMTP id h134so4228305iof.2 for ; Mon, 26 Jun 2017 09:56:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=kN7HxLRxOircp64xVrrBcwvbbKJCTZTG/e54wGvCRZo=; b=E1qnerQqgJTne8dRmuZjnG5lEhHyeop/j06yMEMP28tJvCeWJJlo03F/QBtTS2GVni gHm0PauHq1oRfaThdW0cui9Zxu86JZVvnJRLMHOpsjKGpetGg/BvUUx9KYCFLk3n5JUu GM4245In6N9WhHYRNuhIzOv8pPnsbxRoLRdBA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=kN7HxLRxOircp64xVrrBcwvbbKJCTZTG/e54wGvCRZo=; b=Sy1ZVwnT98+ZAz3BG+SmiQXa/kxF6s8TJ1JgKombgbjfvxo+URcfiW0aGzrKKESh7X btq7eSkC0XLP4psLKWT9iarqB3E1eXUkbNDtjxx8k3ezfcRiABYqsPzh5eQmdH9LDKWJ TxR3dKsxY+w8OiBonGqd+vUqfQsoBavuxvOY/IhDwOx4IYkOMgirGSFtyVqpD/Xpl+i6 0nnXgllCXASDmHuqsYYtaW3UVKwnG36Iji2hDzW8uEVOIxwWsnnnPQaNh0WXk7pcV8Iy d5rktiVeoWyRJ2fdY2uiT+dJSHgGiXFCOiVUhx3yhnmTtNTOxXwFL4TaTtTZk5BOSFR5 bPhQ== X-Gm-Message-State: AKS2vOxe9ES2waQiM8QtIn65rOB93sI35QEmAFnV1W6GGhdcqo/QrRcq QXzxSZOHLCuBmYmOGEePdRR/5luEeKIkf/0= X-Received: by 10.107.63.214 with SMTP id m205mr1522603ioa.87.1498496201108; Mon, 26 Jun 2017 09:56:41 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.134.134 with HTTP; Mon, 26 Jun 2017 09:56:40 -0700 (PDT) In-Reply-To: <20170622110243.10038-1-ard.biesheuvel@linaro.org> References: <20170622110243.10038-1-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Mon, 26 Jun 2017 16:56:40 +0000 Message-ID: To: "edk2-devel@lists.01.org" , "Gao, Liming" , "Kinney, Michael D" Cc: Leif Lindholm , Graeme Gregory , Ard Biesheuvel Subject: Re: [PATCH] MdePkg/IndustryStandard: update ACPI/IORT definitions to revision C X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Jun 2017 16:55:12 -0000 Content-Type: text/plain; charset="UTF-8" On 22 June 2017 at 11:02, Ard Biesheuvel wrote: > This updates the IORT header to include the definitions that were added > in revision C of the IORT spec that was made public recently. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel Ping? And also, would anyone mind if we pull this (and the patch that adds this file) into the UDK2017 branch? > --- > MdePkg/Include/IndustryStandard/IoRemappingTable.h | 19 +++++++++++++++++-- > 1 file changed, 17 insertions(+), 2 deletions(-) > > diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h > index 430df3b956bb..c113afdd2784 100644 > --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h > +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h > @@ -1,7 +1,7 @@ > /** @file > - ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049B > + ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049C > > - http://infocenter.arm.com/help/topic/com.arm.doc.den0049b/DEN0049B_IO_Remapping_Table.pdf > + http://infocenter.arm.com/help/topic/com.arm.doc.den0049c/DEN0049C_IO_Remapping_Table.pdf > > Copyright (c) 2017, Linaro Limited. All rights reserved.
> > @@ -26,6 +26,7 @@ > #define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2 > #define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3 > #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4 > +#define EFI_ACPI_IORT_TYPE_PMCG 0x5 > > #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0 > > @@ -41,6 +42,8 @@ > #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1 > #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2 > #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3 > +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401 0x4 > +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_CAVIUM_THX_v2 0x5 > > #define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0 > #define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1 > @@ -178,6 +181,18 @@ typedef struct { > UINT32 Sync; > } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; > > +/// > +/// Node type 5: PMCG node > +/// > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; > + > + UINT64 Base; > + UINT32 OverflowInterruptGsiv; > + UINT32 NodeReference; > +//EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1]; > +} EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE; > + > #pragma pack() > > #endif > -- > 2.9.3 >