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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Jordan Justen <jordan.l.justen@intel.com>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
	Laszlo Ersek <lersek@redhat.com>,
	Leif Lindholm <leif.lindholm@linaro.org>
Subject: Re: [PATCH] OvmfPkg/QemuVideoDxe: map framebuffer as write-combining/non-executable
Date: Fri, 18 Aug 2017 19:16:31 +0100	[thread overview]
Message-ID: <CAKv+Gu-pqHbudbFQ4OFkFrnLAF-v0xpK5bNU78Hp+VGUd3m1wA@mail.gmail.com> (raw)
In-Reply-To: <150307857518.18247.16857169627688155787@jljusten-skl>

'On 18 August 2017 at 18:49, Jordan Justen <jordan.l.justen@intel.com> wrote:
> On 2017-08-18 10:25:14, Ard Biesheuvel wrote:
>> On 18 August 2017 at 18:20, Jordan Justen <jordan.l.justen@intel.com> wrote:
>> > On 2017-08-18 06:04:01, Ard Biesheuvel wrote:
>> >> On 18 August 2017 at 14:02, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>> >> > When QemuVideoDxe takes control of the framebuffer, it is already
>> >> > mapped EFI_MEMORY_UC by core code, and QemuVideoDxe simply records
>> >> > the base and size from the PCI BAR.
>> >> >
>> >> > On x86 systems, this is sufficient, but on ARM systems, the semantics
>> >> > of EFI_MEMORY_UC regions are quite different from EFI_MEMORY_WC regions,
>> >> > and treating a region like memory (i.e., dereferencing pointers into it
>> >> > or using ordinary CopyMem()/SetMem() functions on it) requires that it
>> >> > be mapped with memory semantics, i.e., EFI_MEMORY_WC, EFI_MEMORY_WT or
>> >> > EFI_MEMORY_WB.
>> >> >
>> >> > Since caching is not appropriate for regions where we rely on side
>> >> > effects, remap the frame buffer EFI_MEMORY_WT.
>> >>
>> >> EFI_MEMORY_WC not WT
>> >
>> > If a single pixel is written, then WC may not write it through
>> > immediately. Would WT be more appropriate?
>> >
>>
>> For ARM, that applies equally to WT AFAIK.
>
> Write-through will not actually write-*through*?
>

Both WC and WT go through a write buffer which may reorder writes and
does not offer any timeliness guarantees AFAIK.

> I'm not sure how well QEMU/KVM models this for x86 or ARM.
>

On ARM, we have coherency issues with framebuffers that are backed by
host memory that is mapped cacheable, because writes via the
uncached/write-through mapping of the guest do not invalidate
cachelines that cover it. Hence the 'the VGA driver does not operate
correctly in the first place' in the commit log. But crashing on an
alignment fault is unfriendly, to say the least, and I would prefer to
adhere to the architectural requirements in any case.

>> >> >
>> >> >  [Protocols]
>> >> > +  gEfiCpuArchProtocolGuid                       # PROTOCOL ALWAYS_CONSUMED
>> >
>> > I don't think a 'Driver Model' driver needs to add arch protocols into
>> > the depex.
>> >
>>
>> To be pedantic: this is not the depex. You can't rely on the protocol
>> header to declare gEfiCpuArchProtocolGuid, and declaring it here makes
>> the build tools add its declaration to AutoGen.h (I think this has to
>> do with the exact .dsc version. Perhaps Laszlo has a better
>> recollection of the details.)
>
> Whoops. You are correct. We want this change...
>
> -Jordan


  parent reply	other threads:[~2017-08-18 18:14 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-18 13:02 [PATCH] OvmfPkg/QemuVideoDxe: map framebuffer as write-combining/non-executable Ard Biesheuvel
2017-08-18 13:04 ` Ard Biesheuvel
2017-08-18 17:20   ` Jordan Justen
2017-08-18 17:25     ` Ard Biesheuvel
2017-08-18 17:49       ` Jordan Justen
2017-08-18 18:08         ` Leif Lindholm
2017-08-18 19:36           ` Jordan Justen
2017-08-18 18:16         ` Ard Biesheuvel [this message]
2017-08-18 18:26 ` Leif Lindholm
2017-08-18 21:42 ` Laszlo Ersek
2017-08-18 21:51   ` Ard Biesheuvel
2017-08-22 14:31     ` Ard Biesheuvel
2017-08-22 15:44       ` Laszlo Ersek

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