From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::241; helo=mail-it0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x241.google.com (mail-it0-x241.google.com [IPv6:2607:f8b0:4001:c0b::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6652222152381 for ; Mon, 4 Dec 2017 05:54:24 -0800 (PST) Received: by mail-it0-x241.google.com with SMTP id t1so12879134ite.5 for ; Mon, 04 Dec 2017 05:58:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=I8VQiFd6gz/EFjAIIhmyyt2fZcpgSL8dOXvH1YcIZ2c=; b=Td8D8EyHaYW2sleI8nqCp8LxWCuzCyG2hQ7hS0v/SN3KgZQtcpTcBAVmwpWHZ28aj1 Qr+aKk+YYzqfvrMYcS58AVvmtSHoHna4Q8jd4uYGB1ayHpwwv4yXgfGKCwbqR5+zCmWO uLUQ5YOwAra1JP0tGYV3e4tNirbWF36f5FSTc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=I8VQiFd6gz/EFjAIIhmyyt2fZcpgSL8dOXvH1YcIZ2c=; b=tptm6KvG78Zy4I6OGdhyecy5ZKG8lDTADsCqkcZZJULrvfFG+88XuvWGe4BtYqru7x ICGCTJaMvcK1fZhF9DKu1wTZIgJhuKQNk/I+TiCLTaWmETvW3aty2ll+X7rf9qTpJhl7 9536NgYgqgOnfCbarn9guZTtIv5se25sHax4xF2gAEuDMjpPJMlaf+HCmIFK6ZM8p2fu 126qdXoyIaZH9T+Qja7+BC1Qz0blwYkPUgTZFkOiNj0ycnyTzzvHiIu0phYbkb70uWhR 6g1Bho1gF4cULXgTXo5w5rztMbbPOlMpT4por+doNHMODmmh6h8cYnrHAeOd5Cw5r6YJ igdw== X-Gm-Message-State: AKGB3mK+9oKXZ5XN5yZx+7IM7OD1gbEjkob0GGudkTeDLQqEajWkC4mN dvkBcXhQhLB7e03rAr1YI4HhnQczPzyqCn+Ic0Zk7Q== X-Google-Smtp-Source: AGs4zMYxHKPLIjs1sd7Ez7IN3fiQsdpVC6FeYYyqrnjbGxWRt3SnE1rU8AB3QKzgThAAYmG646PQ2AoEu/yGvnnU0Ok= X-Received: by 10.36.55.138 with SMTP id r132mr4590327itr.34.1512395934123; Mon, 04 Dec 2017 05:58:54 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.104.16 with HTTP; Mon, 4 Dec 2017 05:58:53 -0800 (PST) In-Reply-To: <20171201023728.4680-8-jian.j.wang@intel.com> References: <20171201023728.4680-1-jian.j.wang@intel.com> <20171201023728.4680-8-jian.j.wang@intel.com> From: Ard Biesheuvel Date: Mon, 4 Dec 2017 13:58:53 +0000 Message-ID: To: Jian J Wang Cc: "edk2-devel@lists.01.org" , Leif Lindholm , Jiewen Yao Subject: Re: [PATCH v3 07/11] ArmPkg/ArmExceptionLib: Add implementation of new API X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 04 Dec 2017 13:54:25 -0000 Content-Type: text/plain; charset="UTF-8" On 1 December 2017 at 02:37, Jian J Wang wrote: >> v3: >> Newly added > > This patch add implementation of following new API introduced into > CpuExceptionHandlerLib. Since this lib hasn't support Stack Guard > and stack switch, the new method just calls original > InitializeCpuExceptionHandlers. > > EFI_STATUS > EFIAPI > InitializeCpuExceptionHandlersEx ( > IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, > IN CPU_EXCEPTION_INIT_DATA_EX *InitDataEx OPTIONAL > ); > > Cc: Leif Lindholm > Cc: Ard Biesheuvel > Cc: Jiewen Yao > Suggested-by: Ayellet Wolman > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jian J Wang > --- > ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c | 33 ++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c > index e8ea1f159d..9fb4a05845 100644 > --- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c > +++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c > @@ -320,3 +320,36 @@ CommonCExceptionHandler( > > DefaultExceptionHandler(ExceptionType, SystemContext); > } > + > +/** > + Initializes all CPU exceptions entries with optional extra initializations. > + > + By default, this method should include all functionalities implemented by > + InitializeCpuExceptionHandlers(), plus extra initialization works, if any. > + This is could be done by calling InitializeCpuExceptionHandlers() directly > + in this method besides the extra works. > + > + InitDataEx is optional and its use and content are processor arch dependent. > + The typical usage of it is to convey resources which have to be reserved > + elsewhere and are necessary for the extra initializations of exception. > + > + @param[in] VectorInfo Pointer to reserved vector list. > + @param[in] InitDataEx Pointer to data optional for extra initializations > + of exception. > + > + @retval EFI_SUCCESS The exceptions have been successfully > + initialized. > + @retval EFI_INVALID_PARAMETER VectorInfo or InitDataEx contains invalid > + content. > + > +**/ > +EFI_STATUS > +EFIAPI > +InitializeCpuExceptionHandlersEx ( > + IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, > + IN CPU_EXCEPTION_INIT_DATA_EX *InitDataEx OPTIONAL > + ) > +{ > + return InitializeCpuExceptionHandlers (VectorInfo); > +} > + I would appreciate it if you could clean up the grammar in the comment block. Other than that, Reviewed-by: Ard Biesheuvel