* [PATCH] MdeModulePkg: XhciDxe: Prevent illegal memory access in XhcSetHsee
@ 2018-09-25 17:58 Marcin Wojtas
2018-09-25 18:29 ` Ard Biesheuvel
0 siblings, 1 reply; 2+ messages in thread
From: Marcin Wojtas @ 2018-09-25 17:58 UTC (permalink / raw)
To: edk2-devel
Cc: feng.tian, michael.d.kinney, liming.gao, leif.lindholm,
ard.biesheuvel, nadavh, mw, jsd, jaz, Ruiyu Ni, Fei1 Wang,
Star Zeng
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1206
Newly added XhcSetHsee() routine reads 4 bytes into
a UINT16 variable causing issues on PCIE and NonDiscoverable
Xhci controllers. Fix that.
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Fei1 Wang <fei1.wang@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
index 89f073e..dfe5f6c 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
@@ -607,7 +607,7 @@ XhcSetHsee (
PciIo = Xhc->PciIo;
Status = PciIo->Pci.Read (
PciIo,
- EfiPciIoWidthUint16,
+ EfiPciIoWidthUint8,
PCI_COMMAND_OFFSET,
sizeof (XhciCmd),
&XhciCmd
--
2.7.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] MdeModulePkg: XhciDxe: Prevent illegal memory access in XhcSetHsee
2018-09-25 17:58 [PATCH] MdeModulePkg: XhciDxe: Prevent illegal memory access in XhcSetHsee Marcin Wojtas
@ 2018-09-25 18:29 ` Ard Biesheuvel
0 siblings, 0 replies; 2+ messages in thread
From: Ard Biesheuvel @ 2018-09-25 18:29 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Tian, Feng, Kinney, Michael D,
Gao, Liming, Leif Lindholm, Nadav Haklai, Jan Dąbroś,
Grzegorz Jaszczyk, Ruiyu Ni, fei1.wang, Zeng, Star
On Tue, 25 Sep 2018 at 19:59, Marcin Wojtas <mw@semihalf.com> wrote:
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1206
>
> Newly added XhcSetHsee() routine reads 4 bytes into
> a UINT16 variable causing issues on PCIE and NonDiscoverable
> Xhci controllers. Fix that.
>
> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
> Cc: Fei1 Wang <fei1.wang@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> index 89f073e..dfe5f6c 100644
> --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> @@ -607,7 +607,7 @@ XhcSetHsee (
> PciIo = Xhc->PciIo;
> Status = PciIo->Pci.Read (
> PciIo,
> - EfiPciIoWidthUint16,
> + EfiPciIoWidthUint8,
> PCI_COMMAND_OFFSET,
> sizeof (XhciCmd),
> &XhciCmd
> --
> 2.7.4
>
Well spotted! But I think a single read of 16 bits is more appropriate
here though.
^ permalink raw reply [flat|nested] 2+ messages in thread
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