From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x22a.google.com (mail-io0-x22a.google.com [IPv6:2607:f8b0:4001:c06::22a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B16451A1E20 for ; Mon, 17 Oct 2016 00:28:51 -0700 (PDT) Received: by mail-io0-x22a.google.com with SMTP id r30so179236726ioi.1 for ; Mon, 17 Oct 2016 00:28:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=YUIk8k9CmQ7JBrnhPpTQDt4qKzIk4xsK+QGVHX9p1eI=; b=KC+hsHJ0z9ZjeAON3+UXdQZ/inCIO8ZxmJk0PcVRz8xy7CmKkuCEgHd9luCJAYiCMu LEgAB1vr8KTPfsWFghEt/ZPPkoU6YJQTY9HO0fzqbDXgSNChvkRQmTvLPlyOr+bjh76U JFU3SXRSbfy3Rf202MjBVBLY5QskKMEyunHHY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=YUIk8k9CmQ7JBrnhPpTQDt4qKzIk4xsK+QGVHX9p1eI=; b=CTWADO2BIfFp7kTgU+8pSthfpYNS5m3gpoigZnUEWpmTlfIblQKbe390GmRsCnPvYb N/H1qzI+Bw5YWmVuSUlnURxNEI7EqTfQUd0UX70I2fZ0mRXI3DNHon12Cft98/zo1Ji9 EmKflVTOYsTavy2J9gUE8KktF2DzNoRlCexg/zJQYC07VG6DvJtukSC32J548PBQWdO9 rrF2xcgm3Yn4o0YAe4ZTJl6dVUkIniKEd/Wh36oLb5AGoGYDTP1Je9tIWn4juiBiiG+v RJnUAjb5g0u5hYXSSngZLlOfEaXNcPtMvILS+gwgVYJOkOm7YkGBQ1OeSwS0ZeoHGM/e LcRg== X-Gm-Message-State: AA6/9RnZv+KPsy0au2X4ReeDfBriX2Reykumxv3Fnniw5AtVpU8AStWP4/ZpkQRRRqfEDxb6jD5Sth1Ke5qGVkNp X-Received: by 10.107.34.197 with SMTP id i188mr20843409ioi.138.1476689330868; Mon, 17 Oct 2016 00:28:50 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.5.139 with HTTP; Mon, 17 Oct 2016 00:28:50 -0700 (PDT) In-Reply-To: <1476680593-4961-1-git-send-email-dennis.chen@arm.com> References: <1476680593-4961-1-git-send-email-dennis.chen@arm.com> From: Ard Biesheuvel Date: Mon, 17 Oct 2016 08:28:50 +0100 Message-ID: To: Dennis Chen Cc: edk2-devel-01 , nd@arm.com, Leif Lindholm Subject: Re: [PATCH] ArmPkg ArmVirtPkg: fix the GIC base address variables as 64-bit X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 Oct 2016 07:28:51 -0000 Content-Type: text/plain; charset=UTF-8 Hi Dennis, On 17 October 2016 at 06:03, Dennis Chen wrote: > Since ACPI spec defines the GIC base addresses (CPU interface, > Distributor and Redistributor*GICv3 only*) as 64-bit, so we > should define these corresponding base address variables as 64-bit > instead of 32-bit. This patch redefines them according to the > ACPI spec. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Cc: Ard Biesheuvel > Cc: Leif Lindholm > Signed-off-by: Dennis Chen > --- > ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 4 ++-- > ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 8 ++++---- Could you split this patch in 2 please, and put Laszlo Ersek on cc for the ArmVirtPkg patch? > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c > index b9ecd55..a4ba5cf 100644 > --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c > +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c > @@ -30,8 +30,8 @@ Abstract: > > extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol; > > -STATIC UINT32 mGicInterruptInterfaceBase; > -STATIC UINT32 mGicDistributorBase; > +STATIC UINTN mGicInterruptInterfaceBase; > +STATIC UINTN mGicDistributorBase; > This should be UINT64 not UINTN > /** > Enable interrupt source Source. > diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > index 64afc4d..16683ef 100644 > --- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > @@ -79,11 +79,11 @@ ArmVirtGicArchLibConstructor ( > > // RegProp[0..1] == { GICD base, GICD size } > DistBase = SwapBytes64 (Reg[0]); > - ASSERT (DistBase < MAX_UINT32); > + ASSERT (DistBase < MAX_UINT64); > This becomes equivalent to 'DistBase != MAX_UINT64' given that a UINT64 cannot exceed MAX_UINT64. That is a nonsensical thing to assert, so it is better to simply drop it > // RegProp[2..3] == { GICR base, GICR size } > RedistBase = SwapBytes64 (Reg[2]); > - ASSERT (RedistBase < MAX_UINT32); > + ASSERT (RedistBase < MAX_UINT64); > Likewise > PcdSet64 (PcdGicDistributorBase, DistBase); > PcdSet64 (PcdGicRedistributorsBase, RedistBase); > @@ -117,8 +117,8 @@ ArmVirtGicArchLibConstructor ( > > DistBase = SwapBytes64 (Reg[0]); > CpuBase = SwapBytes64 (Reg[2]); > - ASSERT (DistBase < MAX_UINT32); > - ASSERT (CpuBase < MAX_UINT32); > + ASSERT (DistBase < MAX_UINT64); > + ASSERT (CpuBase < MAX_UINT64); > Likewise > PcdSet64 (PcdGicDistributorBase, DistBase); > PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase); > -- > 2.7.4 >