From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-it0-x236.google.com (mail-it0-x236.google.com [IPv6:2607:f8b0:4001:c0b::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 96A571A20D1 for ; Fri, 23 Sep 2016 03:55:45 -0700 (PDT) Received: by mail-it0-x236.google.com with SMTP id 186so11591124itf.0 for ; Fri, 23 Sep 2016 03:55:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=5r5LKAVcmE+amdgN+7erDURbBmNCIw/eEGFQHLDBhE4=; b=Nr6sD1fLQxUGVhdcNzXaZgIteueYPkkq6eqRl+CfvzoY3yNAQh93a/VJ+2d5X0mg/m wH1HZ7xSIiq43fNcR1nlAra6e4aalWc/jnL5r3yQaz9GFQxXdKq2GawQs5i/zv1lootN 6WVBUMqs5u5HLMRQw613YD0w8EKNQYVBGlb8M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=5r5LKAVcmE+amdgN+7erDURbBmNCIw/eEGFQHLDBhE4=; b=PFpZ6+vLCRMkZc75AkQ8lEKl3ohToW0vxX/kg1ugaYoxhSy5s7n8iIQEoIXRhL+VWU RSrlb1phRZWDOn3C/QJMLArxWqiv+hqnARTyrtWkYlk8eGOh+tDnZhiYoQTGhOu9LUux puDLV1cs8j0oe4+O5GibZqpTtbyeW4sZEZFBlTSEJSF6H6jK9Ll3pds/8KMgLCwQtEnz BEfOD1xtHaUY0rOsCfQxmSS+ZzFKZaxdiKcktidtxs7nOC2O0ZzJ8hJzOYAEScrd0tUs R7KWiDcmTLXs768wjXCjXs6KV7gpe709wn/e8f1kPIQAJ4SxQK1qycAZBvoLnz8WBWLr tqwQ== X-Gm-Message-State: AA6/9RkwD0EvnTA/Mh7OZTk3D63opljfTqSsx5hWVSlypizbWbioKlpREyRCo+pPLzaGbQuzHyzeXsSyhU6L030a X-Received: by 10.36.137.9 with SMTP id s9mr2472944itd.58.1474628144960; Fri, 23 Sep 2016 03:55:44 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.204.195 with HTTP; Fri, 23 Sep 2016 03:55:44 -0700 (PDT) In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A14B47C035@shsmsx102.ccr.corp.intel.com> References: <1474534469-18442-1-git-send-email-ard.biesheuvel@linaro.org> <4A89E2EF3DFEDB4C8BFDE51014F606A14B47C035@shsmsx102.ccr.corp.intel.com> From: Ard Biesheuvel Date: Fri, 23 Sep 2016 11:55:44 +0100 Message-ID: To: "Gao, Liming" Cc: "edk2-devel@lists.01.org" , "lersek@redhat.com" , "leif.lindholm@linaro.org" Subject: Re: [PATCH] MdePkg/BaseMemoryLibOptDxe ARM AARCH64: fix thinko in SetMem## X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Sep 2016 10:55:45 -0000 Content-Type: text/plain; charset=UTF-8 On 23 September 2016 at 06:03, Gao, Liming wrote: > Reviewed-by: Liming Gao > Pushed, thanks all >> -----Original Message----- >> From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org] >> Sent: Thursday, September 22, 2016 4:54 PM >> To: edk2-devel@lists.01.org; Gao, Liming >> Cc: lersek@redhat.com; leif.lindholm@linaro.org; Ard Biesheuvel >> >> Subject: [PATCH] MdePkg/BaseMemoryLibOptDxe ARM AARCH64: fix thinko >> in SetMem## >> >> The new InternalMemSetMem##() implementations for ARM and AARCH64 >> in >> BaseMemoryLibOptDxe fail to take into account that the 'length' argument >> is not in bytes, but in number of items to be copied. So multiply by the >> item size before proceeding. >> >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Signed-off-by: Ard Biesheuvel >> --- >> MdePkg/Library/BaseMemoryLibOptDxe/AArch64/SetMem.S | 3 ++ >> MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S | 32 >> +++++++++++++------- >> MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.asm | 28 >> ++++++++++++----- >> 3 files changed, 44 insertions(+), 19 deletions(-) >> >> diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/SetMem.S >> b/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/SetMem.S >> index 7f361110d4fe..ec58f759d7b6 100644 >> --- a/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/SetMem.S >> +++ b/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/SetMem.S >> @@ -78,16 +78,19 @@ >> ASM_GLOBAL ASM_PFX(InternalMemSetMem16) >> ASM_PFX(InternalMemSetMem16): >> dup v0.8H, valw >> + lsl count, count, #1 >> b 0f >> >> ASM_GLOBAL ASM_PFX(InternalMemSetMem32) >> ASM_PFX(InternalMemSetMem32): >> dup v0.4S, valw >> + lsl count, count, #2 >> b 0f >> >> ASM_GLOBAL ASM_PFX(InternalMemSetMem64) >> ASM_PFX(InternalMemSetMem64): >> dup v0.2D, val >> + lsl count, count, #3 >> b 0f >> >> ASM_GLOBAL ASM_PFX(InternalMemZeroMem) >> diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S >> b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S >> index c1755539d36a..add04443b2e9 100644 >> --- a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S >> +++ b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S >> @@ -16,27 +16,37 @@ >> .thumb >> .syntax unified >> .align 5 >> -ASM_GLOBAL ASM_PFX(InternalMemZeroMem) >> -ASM_PFX(InternalMemZeroMem): >> - movs r2, #0 >> - >> -ASM_GLOBAL ASM_PFX(InternalMemSetMem) >> -ASM_PFX(InternalMemSetMem): >> - uxtb r2, r2 >> - orr r2, r2, r2, lsl #8 >> - >> ASM_GLOBAL ASM_PFX(InternalMemSetMem16) >> ASM_PFX(InternalMemSetMem16): >> uxth r2, r2 >> + lsl r1, r1, #1 >> orr r2, r2, r2, lsl #16 >> + b 0f >> >> ASM_GLOBAL ASM_PFX(InternalMemSetMem32) >> ASM_PFX(InternalMemSetMem32): >> - mov r3, r2 >> + lsl r1, r1, #2 >> + b 0f >> >> ASM_GLOBAL ASM_PFX(InternalMemSetMem64) >> ASM_PFX(InternalMemSetMem64): >> - push {r4, lr} >> + lsl r1, r1, #3 >> + b 1f >> + >> + .align 5 >> +ASM_GLOBAL ASM_PFX(InternalMemSetMem) >> +ASM_PFX(InternalMemSetMem): >> + uxtb r2, r2 >> + orr r2, r2, r2, lsl #8 >> + orr r2, r2, r2, lsl #16 >> + b 0f >> + >> +ASM_GLOBAL ASM_PFX(InternalMemZeroMem) >> +ASM_PFX(InternalMemZeroMem): >> + movs r2, #0 >> +0: mov r3, r2 >> + >> +1: push {r4, lr} >> cmp r1, #16 // fewer than 16 bytes of input? >> add r1, r1, r0 // r1 := dst + length >> add lr, r0, #16 >> diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.asm >> b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.asm >> index 2a8dc7d019f4..c2e2842a6323 100644 >> --- a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.asm >> +++ b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.asm >> @@ -21,21 +21,33 @@ >> AREA SetMem, CODE, READONLY, CODEALIGN, ALIGN=5 >> THUMB >> >> -InternalMemZeroMem >> - movs r2, #0 >> +InternalMemSetMem16 >> + uxth r2, r2 >> + lsl r1, r1, #1 >> + orr r2, r2, r2, lsl #16 >> + b B0 >> + >> +InternalMemSetMem32 >> + lsl r1, r1, #2 >> + b B0 >> + >> +InternalMemSetMem64 >> + lsl r1, r1, #3 >> + b B1 >> >> + ALIGN 32 >> InternalMemSetMem >> uxtb r2, r2 >> orr r2, r2, r2, lsl #8 >> + orr r2, r2, r2, lsl #16 >> + b B0 >> >> -InternalMemSetMem16 >> - uxth r2, r2 >> - orr r2, r2, r2, lsr #16 >> - >> -InternalMemSetMem32 >> +InternalMemZeroMem >> + movs r2, #0 >> +B0 >> mov r3, r2 >> >> -InternalMemSetMem64 >> +B1 >> push {r4, lr} >> cmp r1, #16 ; fewer than 16 bytes of input? >> add r1, r1, r0 ; r1 := dst + length >> -- >> 2.7.4 >