From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::243; helo=mail-io0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x243.google.com (mail-io0-x243.google.com [IPv6:2607:f8b0:4001:c06::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 04CBF209831F2 for ; Thu, 12 Jul 2018 23:48:55 -0700 (PDT) Received: by mail-io0-x243.google.com with SMTP id z19-v6so30429335ioh.4 for ; Thu, 12 Jul 2018 23:48:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=dhI96Wygwz91hNed9Ltme5Axjx8jsU4yhdLYYECQ3YE=; b=UFHqmzXddSAjR/bkqAmBXval5IC2nIkNKd4shC/kR77Vz3hAlpwy3QOdnZ/7oy7atr xy4LitvNq5zcM8IOZtmfOvzjxDaITpsbUHbL8MCGCCfeGwakZu3PXle1dIeQTfpqmZbJ hKPtXxMmQBmVBFt4RVhlsQ/aHoS4UtuseRpsk= X-Google-DKIM-Signature: v=1; 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charset="UTF-8" On 12 July 2018 at 09:39, Marcin Wojtas wrote: > This patch introduces new library callback (ArmadaSoCDescIcuGet ()), > which dynamically allocates and fills MV_SOC_ICU_DESC structure with > the SoC description of ICU (Interrupt Consolidation Unit). > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > --- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 12 ++++++ > Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 30 +++++++++++++++ > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 39 ++++++++++++++++++++ > 3 files changed, 81 insertions(+) > > diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h > index 3072883..c14b985 100644 > --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h > +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h > @@ -44,6 +44,18 @@ > #define MV_SOC_I2C_BASE(I2c) (0x701000 + ((I2c) * 0x100)) > > // > +// Platform description of ICU (Interrupt Consolidation Unit) controllers > +// > +#define ICU_GIC_MAPPING_OFFSET 0 > +#define ICU_NSR_SET_SPI_BASE 0xf03f0040 > +#define ICU_NSR_CLEAR_SPI_BASE 0xf03f0048 > +#define ICU_SEI_SET_SPI_BASE 0xf03f0230 > +#define ICU_SEI_CLEAR_SPI_BASE 0xf03f0230 > +#define ICU_REI_SET_SPI_BASE 0xf03f0270 > +#define ICU_REI_CLEAR_SPI_BASE 0xf03f0270 > +#define ICU_GROUP_UNSUPPORTED 0x0 > + > +// > // Platform description of MDIO controllers > // > #define MV_SOC_MDIO_BASE(Cp) (MV_SOC_CP_BASE (Cp) + 0x12A200) > diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > index 56efdbe..4d2a85f 100644 > --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > @@ -58,6 +58,36 @@ ArmadaSoCDescI2cGet ( > ); > > // > +// ICU (Interrupt Consolidation Unit) > +// > +typedef enum { > + ICU_GROUP_NSR = 0, > + ICU_GROUP_SR = 1, > + ICU_GROUP_LPI = 2, > + ICU_GROUP_VLPI = 3, > + ICU_GROUP_SEI = 4, > + ICU_GROUP_REI = 5, Are these identifiers defined externally anywhere? If not, it is better to use IcuGroupXxx, which is more idiomatic in UEFI/EDK2. > + ICU_GROUP_MAX, > +} ICU_GROUP; > + > +typedef struct { > + ICU_GROUP Group; > + UINTN SetSpiAddr; > + UINTN ClrSpiAddr; > +} ICU_MSI; > + > +typedef struct { > + UINTN IcuSpiBase; > + ICU_MSI IcuMsi[ICU_GROUP_MAX]; > +} MV_SOC_ICU_DESC; > + > +EFI_STATUS > +EFIAPI > +ArmadaSoCDescIcuGet ( > + IN OUT MV_SOC_ICU_DESC **IcuDesc > + ); > + > +// > // MDIO > // > typedef struct { > diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > index c7c9c13..8383206 100644 > --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > @@ -103,6 +103,45 @@ ArmadaSoCDescI2cGet ( > return EFI_SUCCESS; > } > > +// > +// Allocate the MSI address per interrupt Group, > +// unsupported Groups get NULL address. > +// > +STATIC > +MV_SOC_ICU_DESC mA7k8kIcuDescTemplate = { > + ICU_GIC_MAPPING_OFFSET, > + { > + /* Non secure interrupts */ > + {ICU_GROUP_NSR, ICU_NSR_SET_SPI_BASE, ICU_NSR_CLEAR_SPI_BASE}, Please put a space after { and before } > + /* Secure interrupts */ > + {ICU_GROUP_SR, ICU_GROUP_UNSUPPORTED, ICU_GROUP_UNSUPPORTED}, > + /* LPI interrupts */ > + {ICU_GROUP_LPI, ICU_GROUP_UNSUPPORTED, ICU_GROUP_UNSUPPORTED}, > + /* Virtual LPI interrupts */ > + {ICU_GROUP_VLPI, ICU_GROUP_UNSUPPORTED, ICU_GROUP_UNSUPPORTED}, > + /* System error interrupts */ > + {ICU_GROUP_SEI, ICU_SEI_SET_SPI_BASE, ICU_SEI_CLEAR_SPI_BASE}, > + /* RAM error interrupts */ > + {ICU_GROUP_REI, ICU_REI_SET_SPI_BASE, ICU_REI_CLEAR_SPI_BASE}, > + } > +}; > + > +EFI_STATUS > +EFIAPI > +ArmadaSoCDescIcuGet ( > + IN OUT MV_SOC_ICU_DESC **IcuDesc > + ) > +{ > + *IcuDesc = AllocateCopyPool (sizeof (mA7k8kIcuDescTemplate), > + &mA7k8kIcuDescTemplate); > + if (*IcuDesc == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); > + return EFI_OUT_OF_RESOURCES; > + } > + > + return EFI_SUCCESS; > +} > + > EFI_STATUS > EFIAPI > ArmadaSoCDescMdioGet ( > -- > 2.7.4 >