From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [PATCH edk2-platforms] Silicon/Socionext/SynQuacerI2cDxe: fix TPL handling bug
Date: Wed, 21 Feb 2018 10:44:05 +0000 [thread overview]
Message-ID: <CAKv+Gu89iPV-05zL0XCgDV7-BbwqUqajOHF3T6rz4Ru1pxiUAQ@mail.gmail.com> (raw)
In-Reply-To: <20180221102448.d5liacahtcofcbm7@bivouac.eciton.net>
On 21 February 2018 at 10:24, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Wed, Feb 21, 2018 at 10:19:18AM +0000, Ard Biesheuvel wrote:
>> Currently, SynQuacerI2cStartRequest() increases the TPL to TPL_HIGH_LEVEL
>> while accessing the I2C controller hardware, but fails to restore the TPL
>> to the original level if the call to SynQuacerI2cMasterStart() fails, and
>> returns right away. Given the TPL_HIGH_LEVEL implies that interrupts are
>> disabled, this results in a complete system hang. So instead, break out
>> of the loop, so that the TPL restore will occur before leaving the function.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>> Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
>> index 46c512a20151..b2318a6f5a8c 100644
>> --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
>> +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
>> @@ -324,7 +324,7 @@ SynQuacerI2cStartRequest (
>>
>> Status = SynQuacerI2cMasterStart (I2c, SlaveAddress, Op);
>> if (EFI_ERROR (Status)) {
>> - return Status;
>> + break;
>> }
>>
>> Status = WaitForInterrupt (I2c);
>
> This change also causes
>
> // Stop the transfer
> MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, 0);
>
> to be executed in the faulting case.
>
> Which at the very least looks quirky.
>
I don't think it is unreasonable in general to stop any ongoing
transfer no matter how we leave this function. And in this particular
case, one of the failure modes is F_I2C_BCR_MSS being set without the
bus being busy as a result, and so clearing BCR is actually rather
appropriate here.
next prev parent reply other threads:[~2018-02-21 10:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-21 10:19 [PATCH edk2-platforms] Silicon/Socionext/SynQuacerI2cDxe: fix TPL handling bug Ard Biesheuvel
2018-02-21 10:24 ` Leif Lindholm
2018-02-21 10:44 ` Ard Biesheuvel [this message]
2018-02-21 10:54 ` Leif Lindholm
2018-02-21 10:59 ` Ard Biesheuvel
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