From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::241; helo=mail-io0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x241.google.com (mail-io0-x241.google.com [IPv6:2607:f8b0:4001:c06::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6F6082115C30C for ; Thu, 7 Jun 2018 00:10:35 -0700 (PDT) Received: by mail-io0-x241.google.com with SMTP id l19-v6so10634299ioj.5 for ; Thu, 07 Jun 2018 00:10:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=LJ++ONGgQOMo8055wjO87sx49exqKfjOC234g7MYi9c=; b=gfh2Y3+Giuau0L2GlY5dMJUmKyE9nkMrBYsDkVQCik/bjV7LZKrW4l+1hFWybA+/0a 2yoSIowUKPFCgoImKDibFOdCs/BcHcRKtYm4f2KIts2dCFaez7sJ+QpAJGv17kh3YfuB WtmZHXNV7+lNWMwUrtrGdskEkFBd9BJqlgLvo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=LJ++ONGgQOMo8055wjO87sx49exqKfjOC234g7MYi9c=; b=baeIX5NsscfVVSDmAP0M3QezFd8kvz1iPjnCIsnTc9nN1CbOeHrLyddzv2/iO/nOLz dq4MY5tXIYKMnJJ6c2Cnywd2LWQjDa9+r2h2TR+jeNaVPbvwj54QNPT50/GdCzyyKVB5 HlIEYxwnrPLmIoxqO3Xjd50hVzQrh2SEd/OBeeFWK5/o0QPXP8mPJnAQAWbmlJwCBPY3 zZthBBXlrOVTs2+hyrOrqoA3Q1P5gO+AYA8bqXv/xcGk6ZBkX5iPfGAUKuiquU5X4kND uSVSqqsse+NkwPfnEb7bqiRGwP5zMllJzVAhAdNnbOfrGtuJ3KfQkHtJpSZckL5I+yJJ yatw== X-Gm-Message-State: APt69E1CaON+CptApIRTYcnxNshwc41HwDclScjT9G6I3yuv2fGa9O2c tPQRg1E+cCMf9qlnHPHfjz+895j4FAR08de99/zr8A== X-Google-Smtp-Source: ADUXVKJn8KVed6Mb1KXBwJLAJTzDkFKquqMNcL4CQ5REloxeiGRuMhXKUv2tR8n4DaCIG1Spi4WjZa2+b0dSS0Db5Bc= X-Received: by 2002:a6b:4014:: with SMTP id k20-v6mr480322ioa.277.1528355434745; Thu, 07 Jun 2018 00:10:34 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:bb86:0:0:0:0:0 with HTTP; Thu, 7 Jun 2018 00:10:34 -0700 (PDT) In-Reply-To: References: <20180607050704.9531-1-sigmaepsilon92@gmail.com> From: Ard Biesheuvel Date: Thu, 7 Jun 2018 09:10:34 +0200 Message-ID: To: Michael Zimmermann Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: [PATCH] ArmPkg/ArmDisassemblerLib: fix check for MSR instruction X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Jun 2018 07:10:35 -0000 Content-Type: text/plain; charset="UTF-8" On 7 June 2018 at 07:08, Michael Zimmermann wrote: > CC the arm maintainers > On Thu, Jun 7, 2018 at 7:07 AM Michael Zimmermann > wrote: >> >> From: M1cha >> Could you please use the same 'from' name+address as in the signoff? That saves me the hassle of fixing it up manually. >> GCC8 reported it with the following warning: >> ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c: In function 'DisassembleArmInstruction': >> ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c:397:30: error: bitwise >> comparison always evaluates to false [-Werror=tautological-compare] >> if ((OpCode & 0x0db00000) == 0x03200000) { >> >> This condition trys to be true for both the immediate and the register >> version of the MSR instruction. They get identified inside the if-block >> using the variable I, which contains the value of bit 25. >> >> The problem with the comparison reported by GCC is that the >> bitmask excludes bit 25, while the value requires it to be set to one: >> 0x0db00000: 0000 11011 0 11 00 00 0000 000000000000 >> 0x03200000: 0000 00110 0 10 00 00 0000 000000000000 >> ^ >> So the solution is to just don't require that bit to be set, because >> it gets checked later using 'I', which results in the following value: >> 0x01200000: 0000 00010 0 10 00 00 0000 000000000000 >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Michael Zimmermann >> --- >> ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c >> index 29d9414a78b3..b449a5d3cd83 100644 >> --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c >> +++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c >> @@ -394,7 +394,7 @@ DisassembleArmInstruction ( >> } >> >> >> - if ((OpCode & 0x0db00000) == 0x03200000) { >> + if ((OpCode & 0x0db00000) == 0x01200000) { >> // A4.1.38 MSR{} CPSR_, # MSR{} CPSR_, >> if (I) { >> // MSR{} CPSR_, # Reviewed-by: Ard Biesheuvel Pushed as b20085454e91bb1ded87009722c9994b4684472c Thanks,