From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: Laszlo Ersek <lersek@redhat.com>,
"Gao, Liming" <liming.gao@intel.com>,
"Kinney, Michael D" <michael.d.kinney@intel.com>,
Marc Zyngier <marc.zyngier@arm.com>,
Leif Lindholm <leif.lindholm@linaro.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: Re: [PATCH] MdePkg/BaseIoLibIntrinsicArmVirt ARM: avoid double word loads and stores
Date: Wed, 7 Nov 2018 14:38:37 +0100 [thread overview]
Message-ID: <CAKv+Gu8A65J8xWUt5g9QVcVpQBkgEU2k76aDDP+_t0Y82c+doQ@mail.gmail.com> (raw)
In-Reply-To: <20181107131301.15852-1-ard.biesheuvel@linaro.org>
On 7 November 2018 at 14:13, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> BaseIoLibIntrinsicArmVirt was created to prevent LTO from merging
> accesses to MMIO regions, resulting in instructions with multiple
> output registers that KVM on ARM cannot emulate (since the exception
> syndrome information that KVM relies on can only describe a single
> output register)
>
> However, using double word loads on ARM amounts to the same thing,
> and so code that relies on doing 64-bit MMIO to regions that are
> emulated under KVM (such as the GICv3 TYPER register) will still
> suffer from the original issue.
>
> So replace ldrd and strd with equivalent two instruction sequences.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Please consider this patch with the hunk below appended
> ---
> MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
> index 3ad22bd5706d..0d802d6928d6 100644
> --- a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S
> @@ -125,7 +125,8 @@ ASM_PFX(MmioWrite32Internal):
> // @return The value read.
> //
> ASM_PFX(MmioRead64Internal):
> - ldrd r0, r1, [r0]
> + ldr r1, [r0, #4]
> + ldr r0, [r0]
> dmb
> bx lr
>
> @@ -141,5 +142,6 @@ ASM_PFX(MmioRead64Internal):
> //
> ASM_PFX(MmioWrite64Internal):
> dmb st
> - strd r2, r3, [r0]
> + str r2, [r0]
> + str r3, [r0, #4]
> bx lr
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
index e1a3d68a430c..deba8c1f0c59 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm
@@ -127,7 +127,8 @@ MmioWrite32Internal
; @return The value read.
;
MmioRead64Internal
- ldrd r0, r1, [r0]
+ ldr r1, [r0, #4]
+ ldr r0, [r0]
dmb
bx lr
@@ -143,7 +144,8 @@ MmioRead64Internal
;
MmioWrite64Internal
dmb st
- strd r2, r3, [r0]
+ str r2, [r0]
+ str r3, [r0, #4]
bx lr
END
next prev parent reply other threads:[~2018-11-07 13:38 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-07 13:13 [PATCH] MdePkg/BaseIoLibIntrinsicArmVirt ARM: avoid double word loads and stores Ard Biesheuvel
2018-11-07 13:38 ` Ard Biesheuvel [this message]
2018-11-07 16:47 ` Philippe Mathieu-Daudé
2018-11-07 19:30 ` Laszlo Ersek
2018-11-14 22:15 ` Leif Lindholm
2018-11-15 13:08 ` Ard Biesheuvel
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