From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::241; helo=mail-io0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x241.google.com (mail-io0-x241.google.com [IPv6:2607:f8b0:4001:c06::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 24A6921337A86 for ; Wed, 13 Jun 2018 05:00:40 -0700 (PDT) Received: by mail-io0-x241.google.com with SMTP id t5-v6so3129048ioa.8 for ; Wed, 13 Jun 2018 05:00:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=dw2qe5YuBZzUuztUba7TJ8lJL6oykUluQUTAswDDz58=; b=RZYzqg5g9UJZEqMd9mZMFYZxxNzV9FCZyPA5v3F6RbNQWyHqVOLitLWW4vl4FoTh2g J0ec01LwblO5JzLnwU4owZ05BwDFEEGpfp4UtBv9LMkxPbzQZxuHOZRMPuKX6KYRZFNa AqnJ7ggLQjWfdxUCIlp0Uy6Bjlusfq3XAKy1Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=dw2qe5YuBZzUuztUba7TJ8lJL6oykUluQUTAswDDz58=; b=D71dRRXO/mZAUS1YW3oLaoHdBt5sTOxiKWRGt9D/pkuCtcnvc0QwEGmYkjTQsrVspg ewh62DreB+KLD99t8WlGPJZKdiUsrC3KABICliIqdf6yCUlRVV7uaXwK3h16kJBQp/9H KFJLXImHc67ONNjfdgxAmACRBAs+d1NepmnRpEnGnm1H2BOLmzzqSN7nv85CFol5cBsL Ffx2zglHGAkyXau9PDTMvqDGkXhu42mHPWoBmQbMv9QGrC3iYroPVTXRYZX3hqE2lpZc 6Bz7xHnqw+nVfvy1WtiozSdzM5NKvMO4RKtrnJbDuRvESyk750l47V9ndjI0+Gg3esAK SkDw== X-Gm-Message-State: APt69E0hWrpHEymEsu1CCEYvALJnSRBnUJbtQjFlA/c3N01j6XrtW37/ K7DP1QAH0svOryCYBYP5YY1FwRX7K0EGBdO3iosM1MDxPVU= X-Google-Smtp-Source: ADUXVKIPSD/B6ILCuy1kIBYlP8/VFZMLzm7NZVnkGngGO21QvzeM9RMoP0d44bQ8VQJFedQyDti3vt9WQT+0jC9CPfg= X-Received: by 2002:a6b:dd0b:: with SMTP id f11-v6mr4345049ioc.173.1528891239915; Wed, 13 Jun 2018 05:00:39 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:bbc7:0:0:0:0:0 with HTTP; Wed, 13 Jun 2018 05:00:39 -0700 (PDT) In-Reply-To: <20180613100054.hbevqbfp6myyia5t@bivouac.eciton.net> References: <20180607150818.14393-1-ard.biesheuvel@linaro.org> <20180607150818.14393-3-ard.biesheuvel@linaro.org> <20180612225919.kroissnk2tusdw76@bivouac.eciton.net> <20180613100054.hbevqbfp6myyia5t@bivouac.eciton.net> From: Ard Biesheuvel Date: Wed, 13 Jun 2018 14:00:39 +0200 Message-ID: To: Leif Lindholm Cc: "edk2-devel@lists.01.org" Subject: Re: [PATCH edk2-platforms 2/2] Silicon/NorFlashSynQuacerLib: describe entire firmware region as FV X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 13 Jun 2018 12:00:41 -0000 Content-Type: text/plain; charset="UTF-8" On 13 June 2018 at 12:00, Leif Lindholm wrote: > On Wed, Jun 13, 2018 at 09:19:01AM +0200, Ard Biesheuvel wrote: >> On 13 June 2018 at 00:59, Leif Lindholm wrote: >> > On Thu, Jun 07, 2018 at 05:08:18PM +0200, Ard Biesheuvel wrote: >> >> In order to allow for more flexibility when updating parts of the >> >> firmware via capsule update, expand the description of the code FV >> >> to cover the entire 4 MB region at the base of the NOR flash. >> >> >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> >> Signed-off-by: Ard Biesheuvel >> >> --- >> >> Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c | 5 +++-- >> >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> >> >> diff --git a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c >> >> index 816d8ba33f8c..357082c3d903 100644 >> >> --- a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c >> >> +++ b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c >> >> @@ -23,8 +23,9 @@ STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = { >> >> { >> >> // UEFI code region >> >> SYNQUACER_SPI_NOR_BASE, // device base >> >> - FixedPcdGet64 (PcdFdBaseAddress), // region base >> >> - FixedPcdGet32 (PcdFdSize), // region size >> >> + SYNQUACER_SPI_NOR_BASE, // region base >> >> + FixedPcdGet32 (PcdFlashNvStorageVariableBase) - >> >> + SYNQUACER_SPI_NOR_BASE, // region size >> > >> > Could you define the size as a macro in Platform/MemoryMap.h? >> > >> >> The memory map currently only contains constant macros. I can add this >> expression >> >> FixedPcdGet32 (PcdFlashNvStorageVariableBase) - SYNQUACER_SPI_NOR_BASE >> >> somewhere as a #define but I would prefer it to be elsewhere, given >> that it is not a SoC constant set in stone. > > I'm OK with that, but will just throw in the argument that the fact > that it being a FixedPcdGet32 of PcdFlashNvStorageVariableBase is kind > of set in stone. (And doesn't the Fixed bit make it constant?) > The point is more that MemoryMap.h describes properties of the SoC not properties of our firmware implementation But that also means that I should introduce a symbolic constant for the start of the partition, e.g., #define FW_CODE_REGION_BASE SYNQUACER_SPI_NOR_BASE #define FW_CODE_REGION_SIZE (FixedPcdGet32 (PcdFlashNvStorageVariableBase) - SYNQUACER_SPI_NOR_BASE) but I'd still prefer to keep it local to this file. > Either way, my main interest is in making this struct definition not > break my reading flow, so I'm perfectly happy with the #define > elsewhere. > > / > Leif