From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-it0-x233.google.com (mail-it0-x233.google.com [IPv6:2607:f8b0:4001:c0b::233]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B25F61A1E06 for ; Fri, 2 Sep 2016 14:02:36 -0700 (PDT) Received: by mail-it0-x233.google.com with SMTP id i184so59686172itf.1 for ; Fri, 02 Sep 2016 14:02:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=O7sUWD8o67jXWdVs9D8uDSzvL4j3KzfkASEzM2fGfLk=; b=NST/1Q9FQwOwYvHPgVjXkvj1H2WaCk+XGAdkkQfOErWqB+3lnXGg5oBMlEvbqUaR1R gE+1NHmhCj2JdunN8QdD5nzh0BBpyiF3ocKCx3dP3ioLnDJOcuIrRMeNX1De8VrTmDek 9c8Z13TORcKe4n9EnsxP7xGKCezb5Ao8X4ydA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=O7sUWD8o67jXWdVs9D8uDSzvL4j3KzfkASEzM2fGfLk=; b=ZyYNWDpoL18MbbQafu1VmNDhgMld5ld08yYkPstaLtZrPbX1jj+TlaHShtD8FiVTx0 I8tFW/D8Y27L9eNS1ocjpoiqB/Mr7PehIQBjG6lYC8Pyvr+Luhra5xMnS6+s4V25C9hJ QeTUUy6M3gcGF39bSz2qsfg62KiA/6gnRbwJnM0SDzuUJTA0AFvCtKVpIs1wXZR3PzBj FrwNMuYx1e7n0ZuZwOZVvtMiZ7AXoKTqJvT+KwDzc0agfsWFWbTE5z0hbEftwsD0Oe23 LGOXmPWCxR+m9mbf8bKVnx7QVXXTwQXnaiqPwlrtNDA6CPy2MeBt8zZhcJL+2EbmItLo eO/w== X-Gm-Message-State: AE9vXwNfUkhRXwIDo8yGA3rIgEH94PFdFu9J0f3QxZzgSdXOBo7861ar0c6DOwNf1kO9SIqV0gwsVX/pP4HjZkc6 X-Received: by 10.107.3.204 with SMTP id e73mr1380228ioi.130.1472850155992; Fri, 02 Sep 2016 14:02:35 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.204.195 with HTTP; Fri, 2 Sep 2016 14:02:35 -0700 (PDT) In-Reply-To: References: From: Ard Biesheuvel Date: Fri, 2 Sep 2016 22:02:35 +0100 Message-ID: To: Michael Zimmermann Cc: Laszlo Ersek , "edk2-devel@lists.01.org" Subject: Re: post-ExitBootServices memory protection of RT_Data (ARM) X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 02 Sep 2016 21:02:36 -0000 Content-Type: text/plain; charset=UTF-8 On 2 September 2016 at 21:45, Michael Zimmermann wrote: > If I understand this correctly this is just some MMU feature, right? > I'm talking about a pure ARM(with atag's) linux kernel which is not UEFI > aware. > > Also the LinuxLoader disables almost everything(MMU, caches, it calls > exitbootservices etc). > > I really can't explain technically what UEFI could have done to accomplish > this protection with the MMU being disabled. > No, the kernel is entered with the MMU and caches off. The LinuxLoader is a poorly maintained hack, and it is badly broken on AARCH64. On ARM, however, it should still work. Does the system have an L2 cache which may need invalidation/disabling?