From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [PATCH edk2-platforms 6/8] Silicon/SynQuacer/Stage2Tables: fix 32-bit build
Date: Mon, 14 Jan 2019 18:52:07 +0100 [thread overview]
Message-ID: <CAKv+Gu8NMVgGdYkUawO4C1X9TAYYJd9KuzE4ub-1QLHLL2q8Gw@mail.gmail.com> (raw)
In-Reply-To: <20190114170205.9748-7-ard.biesheuvel@linaro.org>
On Mon, 14 Jan 2019 at 18:02, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>
> The static stage2 page tables don't contain any code, but we are
> relying on the linker to resolve the references to the next level
> tables, so we can only use native word size quantities. So add a
> CPP macro to emit the same quantity in different ways.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S | 12 +++++++++---
The 'elf64-little' in the .inf is now wrong as well, but it seems I
can just remove that and objcopy will detect the input format.
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
> index af55f27bca47..28c7a6ac970f 100644
> --- a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
> +++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
> @@ -32,6 +32,12 @@
> #define TT_S2_L3_PAGE (0x1 << 1)
> #define TT_S2_VALID (0x1 << 0)
>
> +#ifdef __aarch64__
> +#define QWORD(x) .quad (x)
> +#else
> +#define QWORD(x) .long (x), 0
> +#endif
> +
> .altmacro
> .macro for, start, count, do, arg2, arg3, arg4
> .if \count == 1
> @@ -69,7 +75,7 @@
> .section ".rodata", "a", %progbits
> /* level 1 */
> s2_mem_entry 0 /* 0x0000_0000 - 0x3fff_ffff */
> - .quad 1f + TT_S2_TABLE /* 0x4000_0000 - 0x7fff_ffff */
> + QWORD (1f + TT_S2_TABLE) /* 0x4000_0000 - 0x7fff_ffff */
> for 2, 246, s2_mem_entry /* 0x8000_0000 - 0x3d_ffff_ffff */
> for 248, 8, s2_dev_entry /* PCIe MMIO64 */
> for 256, 768, s2_mem_entry /* 0x40_0000_0000 - 0xff_ffff_ffff */
> @@ -77,12 +83,12 @@
> /* level 2 */
> 1:for 0, 256, s2_mem_entry, 21, 0x40000000, 1
>
> - .quad 2f + TT_S2_TABLE /* 0x6000_0000 -> RC #0 bus 0 */
> + QWORD (2f + TT_S2_TABLE) /* 0x6000_0000 -> RC #0 bus 0 */
> for 1, 15, s2_mem_entry, 21, 0x60000000
> for 0, 48, s2_mem_entry, 21, 0x62000000, 1
> for 0, 64, s2_dev_entry, 21, 0x68000000, 1 /* PCIe MMIO32 */
>
> - .quad 3f + TT_S2_TABLE /* 0x7000_0000 -> RC #1 bus 0 */
> + QWORD (3f + TT_S2_TABLE) /* 0x7000_0000 -> RC #1 bus 0 */
> for 1, 15, s2_mem_entry, 21, 0x70000000
> for 0, 48, s2_mem_entry, 21, 0x72000000, 1
> for 0, 64, s2_dev_entry, 21, 0x78000000, 1 /* PCIe MMIO32 */
> --
> 2.17.1
>
next prev parent reply other threads:[~2019-01-14 17:52 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-14 17:01 [PATCH edk2-platforms 0/8] Silicon/SynQuacer: add support for 32-bit mode Ard Biesheuvel
2019-01-14 17:01 ` [PATCH edk2-platforms 1/8] Silicon/SynQuacer/NetsecDxe: fix 32-bit build Ard Biesheuvel
2019-01-14 17:01 ` [PATCH edk2-platforms 2/8] Silicon/SynQuacer/OpteeRngDxe: " Ard Biesheuvel
2019-01-14 17:02 ` [PATCH edk2-platforms 3/8] Silicon/SynQuacerPciHostBridgeLib: fix MMIO32-only configuration Ard Biesheuvel
2019-01-14 17:02 ` [PATCH edk2-platforms 4/8] Silicon/SynQuacerMemoryInitPeiLib: don't map memory above MAX_ALLOC_ADDRESS Ard Biesheuvel
2019-01-14 17:02 ` [PATCH edk2-platforms 5/8] Silicon/SynQuacerMemoryInitPeiLib: fix 32-bit build Ard Biesheuvel
2019-01-14 17:02 ` [PATCH edk2-platforms 6/8] Silicon/SynQuacer/Stage2Tables: " Ard Biesheuvel
2019-01-14 17:52 ` Ard Biesheuvel [this message]
2019-02-11 16:45 ` Leif Lindholm
2019-01-14 17:02 ` [PATCH edk2-platforms 7/8] Platform/Socionext/DeveloperBox: disable EbcDxe for ARM builds Ard Biesheuvel
2019-01-14 17:02 ` [PATCH edk2-platforms 8/8] Platform/Socionext/DeveloperBox: add resolution for ArmSoftFloatLib Ard Biesheuvel
2019-01-15 12:08 ` [PATCH edk2-platforms 0/8] Silicon/SynQuacer: add support for 32-bit mode Leif Lindholm
2019-01-16 20:51 ` Ard Biesheuvel
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