From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::230; helo=mail-it0-x230.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x230.google.com (mail-it0-x230.google.com [IPv6:2607:f8b0:4001:c0b::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 94F912097DD1E for ; Sun, 13 May 2018 04:39:06 -0700 (PDT) Received: by mail-it0-x230.google.com with SMTP id 144-v6so6982904iti.5 for ; Sun, 13 May 2018 04:39:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=iGuCgUl5ZLQ368Sb1Pwb+F9atKE611/t6GP4/1cb6VQ=; b=ALDEeg/+xZSaluBrgEdUkAv94p9hkNZfg/gI3bWs0WkdgNP+kFroZViRTVAv5HkynK fEhMGAjWg6aRpIVcykeTDPswtJtAQwqCETy0VJGByTtXEYwW8D74v4qOJeA2JrsA3U9p CgbrMs83sOtMqzgLpOuC1pvBuuoMY+dPXQTtk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=iGuCgUl5ZLQ368Sb1Pwb+F9atKE611/t6GP4/1cb6VQ=; b=Eq2wzwXVgSOTUOpA7tvAoC0qmatWwIEbZGgay4inQPPe/WScPOBUpDqTe6rzW2oE2p rQDEdyvfzSm7aiAZ/e2IllcIh5CdlSPpnP434HP8VzF5t9KZeBCTmR6ORyCC0CP2DiHi EO+Q4jNhAhxm3pqDpTmSCZLBIj9MELQGFfkT2P3aS6rKW9CGExtBVXfpZpccxDMdHpNg W/LiToP1ehKaXmvpArMDQfSpFMkG2pzaUcC5j0cf3Fnv86xGh2Xh82kOisbtzBfDrtAD 2fGX95RfZ/Cna0ZYpFB6dyuxO4/6WysLGe9C89aiAQRhyestqC4ypF3i4YdL3M+4/jXb Re4Q== X-Gm-Message-State: ALKqPwdKqC0DJaSohRD38JdCfSqBxFXBT4g9+FPgd9TpAHYG3mFLxY2f u1mQzNNPrfgPEIKOOM9YXoN74MmM7m9DCqRIf5mnwA== X-Google-Smtp-Source: AB8JxZpUATPcZJR0OBjfrSjdUm7glyumEGMEB6G2RXYVEMEDr4ZzCWWQWTTETmYFN08ylUCG1PDjqnv40w0oLb39f8w= X-Received: by 2002:a24:5091:: with SMTP id m139-v6mr5298769itb.50.1526211545518; Sun, 13 May 2018 04:39:05 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.187.134 with HTTP; Sun, 13 May 2018 04:39:04 -0700 (PDT) In-Reply-To: References: From: Ard Biesheuvel Date: Sun, 13 May 2018 13:39:04 +0200 Message-ID: To: Michael Zimmermann Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: reasoning beehind prohibiting VFP/NEON on AArch32 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 13 May 2018 11:39:06 -0000 Content-Type: text/plain; charset="UTF-8" On 13 May 2018 at 12:58, Michael Zimmermann wrote: >> No, the other way around. You should raise the TPL to TPL_HIGH_LEVEL >> to prevent being interrupted by something that may corrupt the NEON >> registers. > But isn't that only necessary if you assume that interrupt-handlers use VFP > registers? Event handlers are called from the timer interrupt handler. So unless you want to restrict use of the NEON to non-event handler context (which is not generally possible for libraries), you will need to raise the TPL to avoid any interruptions. > afaik on ARM interrupt handler so basically if you're going to be interrupted during VFP > operations no other > Please correct me if I'm misunderstanding something. I don't follow. Your NEON code running at TPL_APPLICATION may be interrupted at any time by event handlers running at higher TPL levels. If such code uses the NEON, it will corrupt your register file. > On Sun, May 13, 2018 at 12:16 PM Ard Biesheuvel > wrote: > >> On 13 May 2018 at 11:48, Michael Zimmermann > wrote: >> > So basically using them should be safe as long as you're in >> > EfiGetCurrentTpl() < TPL_HIGH_LEVEL, right? > >> No, the other way around. You should raise the TPL to TPL_HIGH_LEVEL >> to prevent being interrupted by something that may corrupt the NEON >> registers. > >> > Also, it'd probably be trivial to add VFP/NEON regs to >> > EFI_SYSTEM_CONTEXT_ARM though that wouldn't help when writing apps for >> > existing uefi platforms. > >> EFI_SYSTEM_CONTEXT_ARM is covered by the UEFI spec, so that is not >> going to change. > >> > On Sun, May 13, 2018 at 9:32 AM Ard Biesheuvel < > ard.biesheuvel@linaro.org> >> > wrote: >> > >> >> On 12 May 2018 at 23:11, Michael Zimmermann >> > wrote: >> >> > For AArch32 the spec says in 2.3.5.3: >> >> >> Floating point, SIMD, vector operations and other instruction set >> >> > extensions must not >> >> > be used. >> >> > >> >> > For AArch64 the spec says in 2.3.6.4: >> >> >> Floating point and SIMD instructions may be used. >> >> > >> >> > So is there a reason why AArch32 is not allowed to use Floating point >> >> > operations? >> >> > I'd understand if this restriction was limited to runtime services > only >> > but >> >> > I don't see how it makes sense for boot services. >> >> > >> >> > I've written a patch which adds NEON support to FrameBufferBltLib to >> >> > increase the rendering performance(by a lot actually) for 24bit > displays >> >> > and thought about sending it to the mailing list - that's why the >> > question >> >> > came up. >> >> > >> > >> >> The reason for the difference between AArch64 and the other EFI >> >> architectures is that AArch64 does not have a softfloat ABI, so it is >> >> impossible to compile floating point code [portably] without enabling >> >> VFP/NEON. This is why AArch64 is the exception here. >> > >> >> Currently, the AArch32 CPU context structure [EFI_SYSTEM_CONTEXT_ARM] >> >> does not cover VFP/NEON registers, and so they are not >> >> preserved/restored when an interrupt is taken. This means you cannot >> >> use VFP/NEON registers in an event handler or you will corrupt the >> >> VFP/NEON state of the interrupted context.