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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [PATCH 2/5] ArmPkg/ArmMmuLib AARCH64: get rid of needless TLB invalidation
Date: Wed, 23 Jan 2019 16:55:28 +0100	[thread overview]
Message-ID: <CAKv+Gu8T4BEM52SakL00OVAAi1zRLkMpQF1WZjeknSAZLr6J-g@mail.gmail.com> (raw)
In-Reply-To: <20190123154622.pibw6mi5gh6ywb26@bivouac.eciton.net>

On Wed, 23 Jan 2019 at 16:46, Leif Lindholm <leif.lindholm@linaro.org> wrote:
>
> On Mon, Jan 07, 2019 at 08:15:01AM +0100, Ard Biesheuvel wrote:
> > Currently, we always invalidate the TLBs entirely after making
> > any modification to the page tables. Now that we have introduced
> > strict memory permissions in quite a number of places, such
> > modifications occur much more often, and it is better for performance
> > to flush only those TLB entries that are actually affected by
> > the changes.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > ---
> >  ArmPkg/Include/Library/ArmMmuLib.h                       |  3 ++-
> >  ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S            |  6 +++---
> >  ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c         | 16 +++++++---------
> >  ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 14 ++++++++------
> >  4 files changed, 20 insertions(+), 19 deletions(-)
> >
> > diff --git a/ArmPkg/Include/Library/ArmMmuLib.h b/ArmPkg/Include/Library/ArmMmuLib.h
> > index fb7fd006417c..d2725810f1c6 100644
> > --- a/ArmPkg/Include/Library/ArmMmuLib.h
> > +++ b/ArmPkg/Include/Library/ArmMmuLib.h
> > @@ -59,7 +59,8 @@ VOID
> >  EFIAPI
> >  ArmReplaceLiveTranslationEntry (
> >    IN  UINT64  *Entry,
> > -  IN  UINT64  Value
> > +  IN  UINT64  Value,
> > +  IN  UINT64  Address
> >    );
> >
> >  EFI_STATUS
> > diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
> > index b7173e00b039..175fb58206b6 100644
> > --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
> > +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
> > @@ -124,15 +124,15 @@ ASM_FUNC(ArmSetMAIR)
> >  //  IN VOID  *MVA                    // X1
> >  //  );
> >  ASM_FUNC(ArmUpdateTranslationTableEntry)
> > -   dc      civac, x0             // Clean and invalidate data line
> > -   dsb     sy
> > +   dsb     nshst
> > +   lsr     x1, x1, #12
> >     EL1_OR_EL2_OR_EL3(x0)
> >  1: tlbi    vaae1, x1             // TLB Invalidate VA , EL1
> >     b       4f
> >  2: tlbi    vae2, x1              // TLB Invalidate VA , EL2
> >     b       4f
> >  3: tlbi    vae3, x1              // TLB Invalidate VA , EL3
> > -4: dsb     sy
> > +4: dsb     nsh
> >     isb
> >     ret
> >
> > diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
> > index d66df3e17a02..e1fabfcbea14 100644
> > --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
> > +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
> > @@ -129,13 +129,14 @@ STATIC
> >  VOID
> >  ReplaceLiveEntry (
> >    IN  UINT64  *Entry,
> > -  IN  UINT64  Value
> > +  IN  UINT64  Value,
> > +  IN  UINT64  Address
> >    )
> >  {
> >    if (!ArmMmuEnabled ()) {
> >      *Entry = Value;
> >    } else {
> > -    ArmReplaceLiveTranslationEntry (Entry, Value);
> > +    ArmReplaceLiveTranslationEntry (Entry, Value, Address);
> >    }
> >  }
> >
> > @@ -296,7 +297,8 @@ GetBlockEntryListFromAddress (
> >
> >          // Fill the BlockEntry with the new TranslationTable
> >          ReplaceLiveEntry (BlockEntry,
> > -          ((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE) | TableAttributes | TT_TYPE_TABLE_ENTRY);
> > +          (UINTN)TranslationTable | TableAttributes | TT_TYPE_TABLE_ENTRY,
> > +          RegionStart);
>

/me pages in the data ...

> OK, this whole patch took a few times around the loop before I think I
> caught on what was happening.
>
> I think I'm down to the only things confusing me being:
> - The name "Address" to refer to something that is always the start
>   address of a 4KB-aligned translation region.
>   Is this because the function will be usable in other contexts in
>   later patches?

I could change it to VirtualAddress if you prefer. It is only passed
for TLB maintenance which is only needed at page granularity, and the
low bits are shifted out anyway.

> - Why drop the & TT_ADDRESS_MASK_DESCRIPTION_TABLE bit here?
>   Was it just always pointless and you decided to drop it while you
>   were at it?
>

IIRC yes. It is a newly allocated page, so the masking does not do anything.


> /
>     Leif
>
> >        }
> >      } else {
> >        if (IndexLevel != PageLevel) {
> > @@ -375,6 +377,8 @@ UpdateRegionMapping (
> >        *BlockEntry &= BlockEntryMask;
> >        *BlockEntry |= (RegionStart & TT_ADDRESS_MASK_BLOCK_ENTRY) | Attributes | Type;
> >
> > +      ArmUpdateTranslationTableEntry (BlockEntry, (VOID *)RegionStart);
> > +
> >        // Go to the next BlockEntry
> >        RegionStart += BlockEntrySize;
> >        RegionLength -= BlockEntrySize;
> > @@ -487,9 +491,6 @@ ArmSetMemoryAttributes (
> >      return Status;
> >    }
> >
> > -  // Invalidate all TLB entries so changes are synced
> > -  ArmInvalidateTlb ();
> > -
> >    return EFI_SUCCESS;
> >  }
> >
> > @@ -512,9 +513,6 @@ SetMemoryRegionAttribute (
> >      return Status;
> >    }
> >
> > -  // Invalidate all TLB entries so changes are synced
> > -  ArmInvalidateTlb ();
> > -
> >    return EFI_SUCCESS;
> >  }
> >
> > diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> > index 90192df24f55..d40c19b2e3e5 100644
> > --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> > +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> > @@ -32,11 +32,12 @@
> >    dmb   sy
> >    dc    ivac, x0
> >
> > -  // flush the TLBs
> > +  // flush translations for the target address from the TLBs
> > +  lsr   x2, x2, #12
> >    .if   \el == 1
> > -  tlbi  vmalle1
> > +  tlbi  vaae1, x2
> >    .else
> > -  tlbi  alle\el
> > +  tlbi  vae\el, x2
> >    .endif
> >    dsb   sy
> >
> > @@ -48,12 +49,13 @@
> >  //VOID
> >  //ArmReplaceLiveTranslationEntry (
> >  //  IN  UINT64  *Entry,
> > -//  IN  UINT64  Value
> > +//  IN  UINT64  Value,
> > +//  IN  UINT64  Address
> >  //  )
> >  ASM_FUNC(ArmReplaceLiveTranslationEntry)
> >
> >    // disable interrupts
> > -  mrs   x2, daif
> > +  mrs   x4, daif
> >    msr   daifset, #0xf
> >    isb
> >
> > @@ -69,7 +71,7 @@ ASM_FUNC(ArmReplaceLiveTranslationEntry)
> >    b     4f
> >  3:__replace_entry 3
> >
> > -4:msr   daif, x2
> > +4:msr   daif, x4
> >    ret
> >
> >  ASM_GLOBAL ASM_PFX(ArmReplaceLiveTranslationEntrySize)
> > --
> > 2.20.1
> >


  reply	other threads:[~2019-01-23 15:55 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-07  7:14 [PATCH 0/5] memory/MMU hardening for AArch64 Ard Biesheuvel
2019-01-07  7:15 ` [PATCH 1/5] ArmPkg/ArmMmuLib AARCH64: fix out of bounds access Ard Biesheuvel
2019-01-14 12:00   ` Leif Lindholm
2019-01-14 18:48     ` Ard Biesheuvel
2019-01-07  7:15 ` [PATCH 2/5] ArmPkg/ArmMmuLib AARCH64: get rid of needless TLB invalidation Ard Biesheuvel
2019-01-23 15:46   ` Leif Lindholm
2019-01-23 15:55     ` Ard Biesheuvel [this message]
2019-01-23 16:12       ` Leif Lindholm
2019-01-23 16:16         ` Ard Biesheuvel
2019-01-23 16:20           ` Leif Lindholm
2019-01-28 12:29             ` Ard Biesheuvel
2019-01-28 18:01               ` Leif Lindholm
2019-01-29 10:32                 ` Ard Biesheuvel
2019-01-07  7:15 ` [PATCH 3/5] ArmPkg/ArmMmuLib AARCH64: implement support for EFI_MEMORY_RP permissions Ard Biesheuvel
2019-01-14 14:29   ` Leif Lindholm
2019-01-14 14:59     ` Ard Biesheuvel
2019-01-14 15:06       ` Leif Lindholm
2019-01-07  7:15 ` [PATCH 4/5] ArmPkg/ArmMmuLib AARCH64: add support for read-only page tables Ard Biesheuvel
2019-01-07  7:15 ` [PATCH 5/5] ArmPkg/CpuDxe: switch to read-only page tables at EndOfDxe Ard Biesheuvel

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