From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::235; helo=mail-it0-x235.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x235.google.com (mail-it0-x235.google.com [IPv6:2607:f8b0:4001:c0b::235]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3D34C2034D833 for ; Tue, 7 Nov 2017 05:18:20 -0800 (PST) Received: by mail-it0-x235.google.com with SMTP id o135so2248463itb.0 for ; Tue, 07 Nov 2017 05:22:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=hhBpSn+6sy4T4anIWEzQJyVfJCVRUIQHDRQeCI6g1I8=; b=dogcnT956+kVjvpxmtMVtbWBATEgKBrOxbH2oBzJqEkVMCRNzj5b9g3oc9g/aUMHKl CY/Sh/3QZa3Ccd+0zpV4IJQH8yGnLdcOw7EvIXTtIKPMu3OJDLjrp51RvwYp46/T1st9 hnP4N0k/888/Cad+ur9lCXlTAyYfCSV60lTZ4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=hhBpSn+6sy4T4anIWEzQJyVfJCVRUIQHDRQeCI6g1I8=; b=QFk4R55JZ1tp+lIjPHuFaOE+CcToBSr+1wROa5XNsKsciOOVYRL8DleZKZu19JaB1W oMXrS5eJGpHsdi1rA8dOqvlVTjDW/Pood7XZzcz6hEf77G7wfie6AuL+UEgp0W/uX8+8 GuMgSU/ZLR0hFprajcjZIM7uCqtobBwgX3Kwlno6kHsYF/ikyCke0ANGWeT3rAV3+STn B64/MEO1nSsTPg09UO2Zn4p7e2qUdFS/AQrbAgm9uny1JNJM+QW72Rs3q8iTlO1fPSao 466pVw+klP9lVcctLRmaPi9VKJTtN84PdzTABVjID+EET3I1Fgt9AISWt3l6kgkK24nZ qqMA== X-Gm-Message-State: AJaThX4qTdTZGuGSepQjmw6KNFw9FkntUVRtQ/JR0jbOE2lVjTrGy7+d wa+5bNtXFqpIJp2nIVLFBZig2oikm1GXawO9FPUwWA== X-Google-Smtp-Source: ABhQp+S0d8+sVDagBPMOlAe7LjzCfaKZxc1LOxhSZ3BriZHtK2cSNNLP+cr+tL1Cc5ZQvBlWoxdNuja8ZPu3JXzr3rE= X-Received: by 10.36.254.140 with SMTP id w134mr2011927ith.73.1510060940000; Tue, 07 Nov 2017 05:22:20 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.131.167 with HTTP; Tue, 7 Nov 2017 05:22:19 -0800 (PST) In-Reply-To: <1510059411-6608-2-git-send-email-heyi.guo@linaro.org> References: <1510059411-6608-1-git-send-email-heyi.guo@linaro.org> <1510059411-6608-2-git-send-email-heyi.guo@linaro.org> From: Ard Biesheuvel Date: Tue, 7 Nov 2017 13:22:19 +0000 Message-ID: To: Heyi Guo Cc: linaro-uefi , "edk2-devel@lists.01.org" , Leif Lindholm , Peicong Li Subject: Re: [PATCH] ArmPkg/ArmMmuLib: Add new attribute WRITE_BACK_NONSHAREABLE X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Nov 2017 13:18:21 -0000 Content-Type: text/plain; charset="UTF-8" On 7 November 2017 at 12:56, Heyi Guo wrote: > From: Peicong Li > > Flash region needs to be set as cacheable (write back) to increase > performance, if PEI is still XIP on flash or DXE FV is decompressed > from flash FV. However some ARM platforms do not support to set flash > as inner shareable since flash is not normal DDR memory and it will > not respond to cache snoop request, which will causes system hang > after MMU is enabled. > > So we need a new ARM memory region attribute WRITE_BACK_NONSHAREABLE > for flash region on these platforms specifically. This attribute will > set the region as write back but not inner shared. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Peicong Li > Signed-off-by: Heyi Guo > Cc: Leif Lindholm > Cc: Ard Biesheuvel Reviewed-by: Ard Biesheuvel > --- > ArmPkg/Include/Library/ArmLib.h | 7 +++++++ > ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 4 ++++ > 2 files changed, 11 insertions(+) > > diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h > index 24ffe9f..38199be 100644 > --- a/ArmPkg/Include/Library/ArmLib.h > +++ b/ArmPkg/Include/Library/ArmLib.h > @@ -41,6 +41,13 @@ typedef enum { > ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED, > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK, > ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK, > + // On some platforms, memory mapped flash region is designed as not supporting > + // shareable attribute, so WRITE_BACK_NONSHAREABLE is added for such special > + // need. > + // Do NOT use below two attributes if you are not sure. > + ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE, > + ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE, > + > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH, > ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH, > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE, > diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > index 8bd1c6f..4b62ecb 100644 > --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > @@ -35,6 +35,10 @@ ArmMemoryAttributeToPageAttribute ( > ) > { > switch (Attributes) { > + case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE: > + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE: > + return TT_ATTR_INDX_MEMORY_WRITE_BACK; > + > case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK: > case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK: > return TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE; > -- > 2.7.2.windows.1 >