From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x22c.google.com (mail-io0-x22c.google.com [IPv6:2607:f8b0:4001:c06::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7A50D1A1DF1 for ; Mon, 26 Sep 2016 15:05:22 -0700 (PDT) Received: by mail-io0-x22c.google.com with SMTP id e66so107565343iod.1 for ; Mon, 26 Sep 2016 15:05:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=OsHJQD5GYEnvRycp3vwzZR1cuJNckOjTqUEv+xxKSDM=; b=O3Pdjhj35jUwJOX7VzgwHMay1Zz9mRNkBxh1eFmqUgmClI8kpObaNWsjCHCP14Mzsi RAXrvDLnJxOyTyMyBYYHP6MdNsw1Q998OdVh6uq9mSVKanlsS8nBCBERJRj4KbwU65wB XRjOCJPjmJ9SIQl8EFt55NNuFRz7fD0ljVojQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=OsHJQD5GYEnvRycp3vwzZR1cuJNckOjTqUEv+xxKSDM=; b=FZxTy1+zTnOpHW7ZtuJweLSj0zAeI077zou9BKpC3/nLqcrnk5cF4ZXT1+WNcELba1 bHYr/63aEL8XGmcfBzMDFEn1UYOJsaTju/lnPxRps/aI2mOd283KNHyVs7YsjKNdtNHl 9yPw3th+DyIeUyOEw7PvndY8dq8rcdeYZI5keqvsCIg8R54QIitv5M/Z9LuAkKvOw48p YYdqdH59EJrWJLGlSiqwcY5s4FXOiWSqNBW+KGpuhpxSD83aH8SOj/ik4/8ET2QK5AqN buyVs07/8ScGyPcCr0ngqR2j9sHOGOQXojgvg79dfgabadmQ1SknsD0cPrhgoD3A6Z/i goow== X-Gm-Message-State: AE9vXwO1qp9eAcgfRDvM6IcT9F+MpK9LVEiwig+JR0pJq8UIw+U+ckf5WUVvfT6BuGofpYSqKGu0YcUlxUpKlD0z X-Received: by 10.107.16.29 with SMTP id y29mr24908119ioi.143.1474927521860; Mon, 26 Sep 2016 15:05:21 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.204.195 with HTTP; Mon, 26 Sep 2016 15:05:21 -0700 (PDT) In-Reply-To: References: From: Ard Biesheuvel Date: Mon, 26 Sep 2016 15:05:21 -0700 Message-ID: To: Kurt Kennett Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: [PATCH] ArmPkg-Drivers/CpuDxe: Fix Mmu Initialization Problem. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Sep 2016 22:05:22 -0000 Content-Type: text/plain; charset=UTF-8 On 26 September 2016 at 10:22, Kurt Kennett wrote: > During Mmu initialization in the CpuDxe, for a page table any bits set > in the 'NextSectionAttributes' are garbage and were set from bits that > are actually part of the pagetable address. We clear it out to zero > so that the SyncCacheConfigPage will use the page attributes instead > of trying to convert the (bogus) section attributes into page > attributes. > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Kurt Kennett > --- > ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c index 63da8ba..64ef1bb 100644 > --- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c > +++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c > @@ -297,6 +297,11 @@ SyncCacheConfig ( > } > NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE; > } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) { > + // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from > + // bits that are actually part of the pagetable address. We clear it out to zero so that > + // the SyncCacheConfigPage will use the page attributes instead of trying to convert the > + // section attributes into page attributes > + NextSectionAttributes = 0; No, still wacky space characters here. Are you using MS Word :-)