From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x22a.google.com (mail-io0-x22a.google.com [IPv6:2607:f8b0:4001:c06::22a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 84FDB82181 for ; Wed, 22 Feb 2017 04:56:05 -0800 (PST) Received: by mail-io0-x22a.google.com with SMTP id l66so1084037ioi.1 for ; Wed, 22 Feb 2017 04:56:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=Gf1yHZlFtZNIuVoxubVBfrQ7LEYuGYELBN8+y8mWyc8=; b=G6PJtuD0Jmcn4vLv6j1E0PGzUGSeY6mKaHnDrdnbg8AAACZt00hFims5YNsWz7jftt PRGtWzcfY4+bP6Iadxa6Fa21/JDSjQSEuovvZeT8LjFt0RCE0qAi/o9nGw4aoNHZlsXd 1/ok6utra1P3gqepb8hrUty09OPgeuQXFve6U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=Gf1yHZlFtZNIuVoxubVBfrQ7LEYuGYELBN8+y8mWyc8=; b=loN/l5zFVDFGuiy6q95PWZea+Q1wAvr6x7jcADz/PRuvkk9XqUuZzRY7aRk67bUk1c xy/PFvEjcrq8bHbQ2gvpsp3cY//5+yOpqH7ih3RFgXfSZWiyu/f0KpJMknjQiuhtWzAF 9tkbX5oS+MOa0SOKcdOSSSOG/oRMmo5vwOM/jQ8RErrFLAMAnubbQtrRBMMCIWc8LVDv 0LXplwltdrNKkHD8o5o36n9eyFEbUIwkJcKiK9OuKm/wUf5G4tXCoga0Ol0a08YPhU8D K+2xtcPSXVLytrDfDLLRW/fzdVBdNhbbOXcKImOevpragBil9Tqz5qhF9yapakS+UvE2 vmUg== X-Gm-Message-State: AMke39kvfxN+2w191TWbZtyglO6gMu6wu93ZLcTXNEIr+oyvqHOqbQ0wHYRAJwMXWv2zUZiC3pcpyJrY0dSwMPDC X-Received: by 10.107.168.25 with SMTP id r25mr5711814ioe.45.1487768164723; Wed, 22 Feb 2017 04:56:04 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.198.134 with HTTP; Wed, 22 Feb 2017 04:56:04 -0800 (PST) In-Reply-To: <1487756301-15646-3-git-send-email-ard.biesheuvel@linaro.org> References: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> <1487756301-15646-3-git-send-email-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Wed, 22 Feb 2017 12:56:04 +0000 Message-ID: To: "edk2-devel@lists.01.org" , Leif Lindholm Cc: Heyi Guo , Ard Biesheuvel Subject: Re: [PATCH 2/4] ArmPkg/ArmLib: AARCH64: set frame pointer in cache maintenance routine X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 22 Feb 2017 12:56:05 -0000 Content-Type: text/plain; charset=UTF-8 On 22 February 2017 at 09:38, Ard Biesheuvel wrote: > Stack and unstack the frame pointer according to the AAPCS in > AArch64AllDataCachesOperation (). > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > index 5cee7c1519c3..c35c05fdf681 100644 > --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > @@ -273,7 +273,7 @@ ASM_FUNC(ArmDisableBranchPrediction) > ASM_FUNC(AArch64AllDataCachesOperation) > // We can use regs 0-7 and 9-15 without having to save/restore. > // Save our link register on the stack. - The stack must always be quad-word aligned > - str x30, [sp, #-16]! > + stp x29, x30, [sp, #-16]! As discussed over IRC, this needs mov x29, sp appended as well. This ensures that this function will show up in a backtrace when an exception is taken (and not handled) in the callback invoked by this function. Without setting (and preserving) x29, it will still point to the caller of AArch64AllDataCachesOperation() > mov x1, x0 // Save Function call in x1 > mrs x6, clidr_el1 // Read EL1 CLIDR > and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC) > @@ -324,7 +324,7 @@ L_Skip: > L_Finished: > dsb sy > isb > - ldr x30, [sp], #0x10 > + ldp x29, x30, [sp], #0x10 > ret > > > -- > 2.7.4 >