From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x232.google.com (mail-io0-x232.google.com [IPv6:2607:f8b0:4001:c06::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3E47B1A1E12 for ; Wed, 3 Aug 2016 02:23:54 -0700 (PDT) Received: by mail-io0-x232.google.com with SMTP id q83so238256244iod.1 for ; Wed, 03 Aug 2016 02:23:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=CVFiDvlMW4Yx2X6hfAD/CBpjY+UVAQSN0bIYPQdeYTQ=; b=PS+OKU+hs6uc4OA0tlUek0giTGP/o7JrfZmsA2FV6N8MVq7B8M/udXbQVVHxmOobaO +gpSruKehvOHCW8iYllgk4CdXOWhGhqswwR0AJsi9Z3qv1IySo1xFSwVYHGOmK8ZueZS QHLqu+1yzon6iBuepxWj2iR3roXgvL6rf5Xpg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=CVFiDvlMW4Yx2X6hfAD/CBpjY+UVAQSN0bIYPQdeYTQ=; b=V0kD0KacsMZCK3SZUfZQtmjcrRzzpjSKz0pYiuijKKNAEjdh/MOa39SR6O0ZErvima /mdqUxI3ifmjC3Qz+Llapgg8yWAAJBL1XowJfNONO6tPYQkiJhilk12fjiX43otbewn1 b+Z+Iy55lPtehC5oNHnN+feNqYGJtFmD/4PCa7o5AZDADm/e+frr+B0Pk2iXT9+KEpQL tuc1kd0CwrovY71L0PB66uTkVV+9IGFufTRprz6WDD5zIIZ7IbdS4dL2JKmacBuAcLpQ CxWBk2Uyg8FHOXt5wPVtWx1a+XopvhxjxqzZJPxkVVArOg9ef5+xiJ0ltW+4Br8+eOAT 3NqA== X-Gm-Message-State: AEkoouvQivIveea+gFBnQGHgy3d06VMhOYdaNL6jeUa1FcCIyn4Y3iE3MM9Hlihft/v8vQtZwAPBBO5aQgA9LsbI X-Received: by 10.107.40.133 with SMTP id o127mr63743449ioo.183.1470216233549; Wed, 03 Aug 2016 02:23:53 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.204.195 with HTTP; Wed, 3 Aug 2016 02:23:53 -0700 (PDT) In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A1155E4C14@shsmsx102.ccr.corp.intel.com> References: <1470148772-15712-1-git-send-email-ard.biesheuvel@linaro.org> <4A89E2EF3DFEDB4C8BFDE51014F606A1155E457A@shsmsx102.ccr.corp.intel.com> <4A89E2EF3DFEDB4C8BFDE51014F606A1155E4C14@shsmsx102.ccr.corp.intel.com> From: Ard Biesheuvel Date: Wed, 3 Aug 2016 11:23:53 +0200 Message-ID: To: "Gao, Liming" Cc: "Zhu, Yonghong" , "Justen, Jordan L" , "edk2-devel@lists.01.org" , "leif.lindholm@linaro.org" , "sigmaepsilon92@gmail.com" Subject: Re: [PATCH 0/3] BaseTools GCC: pass CC flags to linker X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Aug 2016 09:23:54 -0000 Content-Type: text/plain; charset=UTF-8 On 3 August 2016 at 10:58, Gao, Liming wrote: > Ard: > I see Steven says it doesn't work, yet. So, I am curious what real issue is resolved by this patch? > For example, when building ArmVirtQemu for ARM, you may get warnings (or errors when -Werror is enabled) like lto1: warning: switch -mcpu=cortex-a15 conflicts with -march=armv7-a switch where cortex-a15 is the target set by the platform .DSC, and armv7-a is the default target of the compiler. In this particular example, that does not cause any issues, since cortex-a15 is compatible with armv7-a. However, if you are building for ARM11, the code generation performed by the linker will generate incompatible code unless we pass it the -mcpu=arm11 option as well. The same applies to things like -mstrict-alignment and -mcmodel=xxx. I suppose the same issue exists for IA32, where the -march/-mcpu options in the platform may deviate from the compiler's default. -- Ard.