Re: AARCH64 : C Model Small Alignment requirements

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

On 26 May 2017 at 01:02, Pankaj Bansal <pankaj.bansal@nxp.com> wrote:
> Hello Edk2 team,
>
> We are facing a compilation error in our ARMV8 based NXP board.
> We are using c model small with GCC49 and GCC5.
>
> "WriteSections64(): %s  due to its size (> 1 MB), this module requires 4 KB
> section alignment."
>
> With below GCC options, this error is not observed
>
> [BuildOptions]
>    GCC:*_*_AARCH64_CC_FLAGS = -mcmodel=small
> +  GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x1000
>
> My question is, is this necessary to use page size 4K with c model small ?
>

Yes. The small C model relies on ADRP instructions, which require the
link time and load time offsets of the executable to be equal modulo
4096.

> P.S : This compilation error is not observed with default GCC49/GCC5 options
> (i.e. C Model tiny and Page Size 0x20)
>

The tiny C model does not have this limitation because it uses ADR
instructions instead, whose range is limited to 1 MB. The PE/COFF
conversion tool will convert small C model code to tiny C model code
if it can, i.e., if the module size < 1 MB. For bigger modules, this
is not possible, which is when you get the error above.