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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Laszlo Ersek <lersek@redhat.com>
Cc: Dennis Chen <dennis.chen@arm.com>,
	"edk2-devel@lists.01.org" <edk2-devel@ml01.01.org>,
	nd@arm.com,  Leif Lindholm <leif.lindholm@linaro.org>
Subject: Re: [RESEND PATCH] ArmVirtPkg: Bit width adaption in ASSERT()
Date: Fri, 21 Oct 2016 09:21:24 +0100	[thread overview]
Message-ID: <CAKv+Gu8mtoHUpfbOWow=DVr=0ezk8PKfR2=D1ZxHz3hNuuUrpw@mail.gmail.com> (raw)
In-Reply-To: <6e4f61bc-fdc0-a08c-c38a-b9e7696b5a2b@redhat.com>

On 21 October 2016 at 09:02, Laszlo Ersek <lersek@redhat.com> wrote:
> On 10/21/16 07:50, Dennis Chen wrote:
>> Since All the GIC base address variables has been aligned to 64-bit, it
>> doesn't make sense to continue use MAX_UINT32 in ASSERT() statement, so
>> this patch uses MAX_UINTN to adapt to this kind of change.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Cc: Leif Lindholm <leif.lindholm@linaro.org>
>> Cc: Laszlo Ersek <lersek@redhat.com>
>> Signed-off-by: Dennis Chen <dennis.chen@arm.com>
>> ---
>>  ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
>> index 64afc4d..6488061 100644
>> --- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
>> +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
>> @@ -79,11 +79,11 @@ ArmVirtGicArchLibConstructor (
>>
>>      // RegProp[0..1] == { GICD base, GICD size }
>>      DistBase = SwapBytes64 (Reg[0]);
>> -    ASSERT (DistBase < MAX_UINT32);
>> +    ASSERT (DistBase < MAX_UINTN);
>>
>>      // RegProp[2..3] == { GICR base, GICR size }
>>      RedistBase = SwapBytes64 (Reg[2]);
>> -    ASSERT (RedistBase < MAX_UINT32);
>> +    ASSERT (RedistBase < MAX_UINTN);
>>
>>      PcdSet64 (PcdGicDistributorBase, DistBase);
>>      PcdSet64 (PcdGicRedistributorsBase, RedistBase);
>> @@ -117,8 +117,8 @@ ArmVirtGicArchLibConstructor (
>>
>>      DistBase = SwapBytes64 (Reg[0]);
>>      CpuBase  = SwapBytes64 (Reg[2]);
>> -    ASSERT (DistBase < MAX_UINT32);
>> -    ASSERT (CpuBase < MAX_UINT32);
>> +    ASSERT (DistBase < MAX_UINTN);
>> +    ASSERT (CpuBase < MAX_UINTN);
>>
>>      PcdSet64 (PcdGicDistributorBase, DistBase);
>>      PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase);
>>
>
> Ard, can you please handle this iteration of the patch as well?
>

Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> I do have one suggestion, for the subject:
>
> ArmVirtPkg/ArmVirtGicArchLib: adapt ASSERT()s to 64-bit base addresses
>
> If you guys agree, I think it can be done on commit. With that,
>
> Acked-by: Laszlo Ersek <lersek@redhat.com>
>

Agreed

Pushed as 041e842ab7b3


  reply	other threads:[~2016-10-21  8:21 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-21  5:50 [RESEND PATCH] ArmVirtPkg: Bit width adaption in ASSERT() Dennis Chen
2016-10-21  8:02 ` Laszlo Ersek
2016-10-21  8:21   ` Ard Biesheuvel [this message]
2016-10-24  3:01   ` Dennis Chen

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