From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-it0-x22b.google.com (mail-it0-x22b.google.com [IPv6:2607:f8b0:4001:c0b::22b]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CFEA41A1E72 for ; Fri, 21 Oct 2016 01:21:25 -0700 (PDT) Received: by mail-it0-x22b.google.com with SMTP id m138so150468832itm.0 for ; Fri, 21 Oct 2016 01:21:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=oBov7AlWamSZrqKI7oRrr/0kBPEdHCgKkVWKmiSQmN4=; b=aidDBo8hnUng+UGA0vWlisxWQttf3dyMOuIgO2xZL11K0WmgAJsw2ioJLOnsBfhAT5 UEYTz4OcQujZInbUl4VEJHDpUAc+ZPMZMsi16VAR8TiQ6fPhp2jSFXjp0GwW7rZOiwDF zZCA1dtwi2+Bl1awbo5d+AAy+xAOoFTHFt8W4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=oBov7AlWamSZrqKI7oRrr/0kBPEdHCgKkVWKmiSQmN4=; b=Jcu/gVYFfQ1K+s80y8dvHAO7P8ChzbRu2VKRbGL2BDFPrvhzh0PTvAMT27X8rl7ppC et+93lXMqajytBcDS212jYkVHH+F+Ai62WYKJOYJ/992sQhkMuBTfitYXRbGS7YLJjkW Q8rRb/ntqmus08uyT9kOVzwOBY69kZ82De+Ob9Uw/1WVHobiaa/7VaT1cIW2jLhPt+9P SDAnf7WYAc7Ibai+9vxryNPTu8JDdFO9NgpfFgAJRqs/LQqEQVHblnge+sygPbWM2OEK bb1pjJWqUg2kxKT2ajFLN2YbrMVi3+Xh+c7unqkEyzJoYv++3ggCAL9jEp6ntybqmFzL NqeQ== X-Gm-Message-State: AA6/9RkJkBJn0hA73wQrtd6qQqbd3/ih0+pkvrIsoo2iFe1DelW3JkxHsSbXTmiyT7SoM7/maBoaU1rPppOjUAZu X-Received: by 10.36.5.65 with SMTP id 62mr4704084itl.63.1477038085238; Fri, 21 Oct 2016 01:21:25 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.5.139 with HTTP; Fri, 21 Oct 2016 01:21:24 -0700 (PDT) In-Reply-To: <6e4f61bc-fdc0-a08c-c38a-b9e7696b5a2b@redhat.com> References: <1477029024-31932-1-git-send-email-dennis.chen@arm.com> <6e4f61bc-fdc0-a08c-c38a-b9e7696b5a2b@redhat.com> From: Ard Biesheuvel Date: Fri, 21 Oct 2016 09:21:24 +0100 Message-ID: To: Laszlo Ersek Cc: Dennis Chen , "edk2-devel@lists.01.org" , nd@arm.com, Leif Lindholm Subject: Re: [RESEND PATCH] ArmVirtPkg: Bit width adaption in ASSERT() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Oct 2016 08:21:26 -0000 Content-Type: text/plain; charset=UTF-8 On 21 October 2016 at 09:02, Laszlo Ersek wrote: > On 10/21/16 07:50, Dennis Chen wrote: >> Since All the GIC base address variables has been aligned to 64-bit, it >> doesn't make sense to continue use MAX_UINT32 in ASSERT() statement, so >> this patch uses MAX_UINTN to adapt to this kind of change. >> >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Cc: Ard Biesheuvel >> Cc: Leif Lindholm >> Cc: Laszlo Ersek >> Signed-off-by: Dennis Chen >> --- >> ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c >> index 64afc4d..6488061 100644 >> --- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c >> +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c >> @@ -79,11 +79,11 @@ ArmVirtGicArchLibConstructor ( >> >> // RegProp[0..1] == { GICD base, GICD size } >> DistBase = SwapBytes64 (Reg[0]); >> - ASSERT (DistBase < MAX_UINT32); >> + ASSERT (DistBase < MAX_UINTN); >> >> // RegProp[2..3] == { GICR base, GICR size } >> RedistBase = SwapBytes64 (Reg[2]); >> - ASSERT (RedistBase < MAX_UINT32); >> + ASSERT (RedistBase < MAX_UINTN); >> >> PcdSet64 (PcdGicDistributorBase, DistBase); >> PcdSet64 (PcdGicRedistributorsBase, RedistBase); >> @@ -117,8 +117,8 @@ ArmVirtGicArchLibConstructor ( >> >> DistBase = SwapBytes64 (Reg[0]); >> CpuBase = SwapBytes64 (Reg[2]); >> - ASSERT (DistBase < MAX_UINT32); >> - ASSERT (CpuBase < MAX_UINT32); >> + ASSERT (DistBase < MAX_UINTN); >> + ASSERT (CpuBase < MAX_UINTN); >> >> PcdSet64 (PcdGicDistributorBase, DistBase); >> PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase); >> > > Ard, can you please handle this iteration of the patch as well? > Reviewed-by: Ard Biesheuvel > I do have one suggestion, for the subject: > > ArmVirtPkg/ArmVirtGicArchLib: adapt ASSERT()s to 64-bit base addresses > > If you guys agree, I think it can be done on commit. With that, > > Acked-by: Laszlo Ersek > Agreed Pushed as 041e842ab7b3