From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::241; helo=mail-it0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x241.google.com (mail-it0-x241.google.com [IPv6:2607:f8b0:4001:c0b::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A1568210E2A5D for ; Fri, 1 Jun 2018 08:30:09 -0700 (PDT) Received: by mail-it0-x241.google.com with SMTP id d10-v6so2291676itj.1 for ; Fri, 01 Jun 2018 08:30:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=IHfb6EaM7zKX6uvhDz0KlhD4ggFpA4fbpAxFNa2PkTs=; b=I/XZSwUU+R1wX2xY5JGjmkoqo+ygC0ia/9d2mXzWxhKKAjnTFnsQhyYd7SreQ0LJQG Wjs+2QX4hQNlm2gcirmos0/pf3reAm03Zq7p1x5sO/Rf9SZbeA9Cg/A89nfeUBaADhGM 2k+TBMAh0tdSLhj9vjG0iE57DzQmxWu1zvJUI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=IHfb6EaM7zKX6uvhDz0KlhD4ggFpA4fbpAxFNa2PkTs=; b=XD3omjGQZhT29haa9qQ9exuAExRZB93aObhcB41BKttrMKcQNNnzsYFZPEza1KgFjR INKM6QNL6UDAM67ezrYqlwjqMVOLdRiKATukAD/OQb3bJW5Rdddkfo5jyDABQOpGt34D SI3evEy5ro8dZFPp2NvIpqv9e2m3S5Z/zcbUcIIVK+Tf9S/5vhaAUKV04bUcu2S3jafd Gc8z6c8nVNs/rPTYSLvyibD7CFC4I7/P+ZoQX+jK1EyhDf/9PzlrMFSOVKniMARX4mOx PQk2MBXDxHEPc+85fvn0p43gZn5rzdhDno39PoOwwBxoZrYou4IWYvXKPbkF++NWW6on m8aw== X-Gm-Message-State: APt69E2HMgz/3/WovsmROzv7y7Fsj5TQpL4d6vWrreQ9Q1EugRK5WOS2 oCAOlf8X3G5aYb05LlGmoIrHu/0AwdarJtwkd5okWA== X-Google-Smtp-Source: ADUXVKLh0HbWwZUOa5suZMhZlMJCNeSJwyN8VZdwOY60DC8UVKB9HmcAJotZ/ang7AS5pI3Gytuxlp0WwOyUJaLFeWI= X-Received: by 2002:a24:5390:: with SMTP id n138-v6mr4688064itb.42.1527867008827; Fri, 01 Jun 2018 08:30:08 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:bb86:0:0:0:0:0 with HTTP; Fri, 1 Jun 2018 08:30:08 -0700 (PDT) In-Reply-To: <1527863526-5494-3-git-send-email-mw@semihalf.com> References: <1527863526-5494-1-git-send-email-mw@semihalf.com> <1527863526-5494-3-git-send-email-mw@semihalf.com> From: Ard Biesheuvel Date: Fri, 1 Jun 2018 17:30:08 +0200 Message-ID: To: Marcin Wojtas Cc: "edk2-devel@lists.01.org" , Leif Lindholm , =?UTF-8?B?SmFuIETEhWJyb8Wb?= , Hua Jing , Grzegorz Jaszczyk , davidsn@marvell.com Subject: Re: [platforms PATCH 2/4] Marvell/Aramda7k8k: Enable PEI booting stage X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Jun 2018 15:30:09 -0000 Content-Type: text/plain; charset="UTF-8" On 1 June 2018 at 16:32, Marcin Wojtas wrote: > PEI phase will allow to use more robust platform initialization, > with new features like the capsule support. Wire up all > dependencies for that purpose. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > --- > Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 15 ++++++-- > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 40 ++++++++++++++++++-- > 2 files changed, 48 insertions(+), 7 deletions(-) > > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf > index 69cb4cd..bf04f4d 100644 > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf > @@ -63,7 +63,7 @@ DATA = { > !endif > } > > -0x00001000|0x000ff000 > +0x00001000|0x001ff000 > gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > FV = FVMAIN_COMPACT > > @@ -221,7 +221,14 @@ READ_STATUS = TRUE > READ_LOCK_CAP = TRUE > READ_LOCK_STATUS = TRUE > > - INF ArmPlatformPkg/PrePi/PeiUniCore.inf > + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf > + INF MdeModulePkg/Core/Pei/PeiMain.inf > + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf > + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf > + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf > + INF ArmPkg/Drivers/CpuPei/CpuPei.inf > + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf > + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > > FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { > @@ -264,14 +271,14 @@ READ_LOCK_STATUS = TRUE > > [Rule.Common.PEI_CORE] > FILE PEI_CORE = $(NAMED_GUID) { > - TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > UI STRING ="$(MODULE_NAME)" Optional > } > > [Rule.Common.PEIM] > FILE PEIM = $(NAMED_GUID) { > PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex > - TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi > + TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi > UI STRING="$(MODULE_NAME)" Optional > } > > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > index 4129742..195b6b7 100644 > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > @@ -145,13 +145,28 @@ > MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf > HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf > - PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf > ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf > PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > [LibraryClasses.common.SEC, LibraryClasses.common.PEIM] > - MemoryInitPeiLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.inf > BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf > + > +[LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM] > + PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf > + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf > + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf > + ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf > + PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf > + > +[LibraryClasses.common.PEI_CORE] > + PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf > + > +[LibraryClasses.common.PEIM] > + PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf > + MemoryInitPeiLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.inf > > [LibraryClasses.common.DXE_CORE] > HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > @@ -336,8 +351,13 @@ > # ARM Pcds > gArmTokenSpaceGuid.PcdSystemMemoryBase|0 > gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000 > + > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|36 > gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36 > > + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000 > + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0xFFC0 > + These were copy/pasted from SynQuacer, I suppose? Ideally, these should point to some memory that is not exposed to the OS, so that the PEI phase cannot corrupt a capsule image that has been left in DRAM by the OS. This only becomes relevant once we implement support for PSCI warm reboot, otherwise DRAM will be cleared anyway. However, pointing these into a random slice of main memory feels a little risky. Do you have non-secure SRAM on this SoC? > # Secure region reservation > gMarvellTokenSpaceGuid.PcdSecureRegionBase|0x4000000 > gMarvellTokenSpaceGuid.PcdSecureRegionSize|0x0200000 > @@ -364,7 +384,21 @@ > [Components.common] > > # PEI Phase modules > - ArmPlatformPkg/PrePi/PeiUniCore.inf > + ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf > + MdeModulePkg/Core/Pei/PeiMain.inf > + MdeModulePkg/Universal/PCD/Pei/Pcd.inf { > + > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + } > + ArmPlatformPkg/PlatformPei/PlatformPeim.inf > + ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf > + ArmPkg/Drivers/CpuPei/CpuPei.inf > + MdeModulePkg/Universal/Variable/Pei/VariablePei.inf > + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { > + > + NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf > + } > + > > # DXE > MdeModulePkg/Core/Dxe/DxeMain.inf { > -- > 2.7.4 >