From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-it0-x22f.google.com (mail-it0-x22f.google.com [IPv6:2607:f8b0:4001:c0b::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C0B3B2095D8C9 for ; Thu, 13 Jul 2017 09:58:57 -0700 (PDT) Received: by mail-it0-x22f.google.com with SMTP id k192so52046953ith.1 for ; Thu, 13 Jul 2017 10:00:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=cbp/MwDeEf9xb9fQQYHGn/NGIS65sM5WQig+nJCtD34=; b=KSztqLgYQSFI1ceIqExE4q+ffWtxH1mJneGgfCfuIDHlgzILq+K+4/SVGbnJTvssjU N+80Ai1gby+oAJUcdGPCm9DXR0KZZPsWFHfb7oZDm2IGjNEZToZOY5lEKeX//kcImm27 dQVTN0hlJXgNPAi/KVq/Ze0byGDpLR0b9k/xw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=cbp/MwDeEf9xb9fQQYHGn/NGIS65sM5WQig+nJCtD34=; b=bdqNSyUW2j7eQo5OZ2B2m4b7gFans6fdviUfIVOxS0fseUXU/YZ9h/xfmlqPzeR2V+ 6pbyEMDM26GAmYV1FcBc950bIg21HDmNGlJ8j56EKWMMbKSmv2qHkifXsq/QWgR71/IN GrMv4DbTFKqgc5pXUulD7g69ZjWyF14GXiO3dRTNnvQ+H7MrxUmh+/waSE1E5Ql8x45H BN4Y5pjwDG3/OwFs1UpLZamyWouH7zEqzSV4Jk15EdVsj36lRqrATQbdk0YgR7rWVmZk j0y1zf1OvnMLJQoCbFSOkNyd9lTNvDZRhqOfYLsPeO8qbr2iFNQs2lHXrlY28AfmRrNv mLNA== X-Gm-Message-State: AIVw111cPQVZB0JD3qMXkLRyZ4P1qs5wVafrszJpOcXtZq7krtdAhYm4 EmKcBiRO5oZakDZ8+BGMOhEM916clhxV X-Received: by 10.107.176.11 with SMTP id z11mr4423225ioe.173.1499965244496; Thu, 13 Jul 2017 10:00:44 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.134.134 with HTTP; Thu, 13 Jul 2017 10:00:43 -0700 (PDT) In-Reply-To: References: <20170713124844.23556-1-ard.biesheuvel@linaro.org> <20170713124844.23556-2-ard.biesheuvel@linaro.org> <20170713141147.GD26676@bivouac.eciton.net> From: Ard Biesheuvel Date: Thu, 13 Jul 2017 18:00:43 +0100 Message-ID: To: Alexei Fedorov Cc: Leif Lindholm , "edk2-devel@lists.01.org" , "liming.gao@intel.com" , "yonghong.zhu@intel.com" , Evan Lloyd Subject: Re: [PATCH 2/2] BaseTools/tools_def AARCH64: avoid SIMD register in XIP code X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Jul 2017 16:58:58 -0000 Content-Type: text/plain; charset="UTF-8" On 13 July 2017 at 17:56, Alexei Fedorov wrote: > I'm getting > > > UEFI firmware (version built at 16:34:57 on Jul 13 2017) > Synchronous Exception at 0x00000000F5451338 > : > > EL2:0x00000000F5451338 : LDR q0,[x9,x0] > EL2:0x00000000F545133C : ADD x1,x1,#1 > EL2:0x00000000F5451340 : CMP x7,x1 > EL2:0x00000000F5451344 : STR q0,[x2,x0] > EL2:0x00000000F5451348 : ADD x0,x0,#0x10 > EL2:0x00000000F545134C : B.HI {pc}-0x14 ; 0xf5451338 > ... > > with X0=0 & X9 = 0x000000000BFD0008 (Flash memory) in AlignedCopyMem() > function > > (edk2\ArmPlatformPkg\Drivers\NorFlashDxe\NorFlashDxe.c): > > > // r:\edk2\ArmPlatformPkg\Drivers\NorFlashDxe\NorFlashDxe.c:784: > *Destination64++ = *Source64++; > .loc 10 784 0 > ldr q0, [x9, x0] // MEM[base: vectp.229_593, index: > ivtmp.349_1117, offset: 0B], MEM[base: vectp.229_593, index: ivtmp.349_1117, > offset: 0B] > add x1, x1, 1 // ivtmp_603, ivtmp_603, > cmp x7, x1 // bnd.223, ivtmp_603 > str q0, [x2, x0] // MEM[base: vectp.229_593, index: > ivtmp.349_1117, offset: 0B], MEM[base: vectp_Buffer.232_598, index: > ivtmp.349_1117, offset: 0B] > add x0, x0, 16 // ivtmp.349, ivtmp.349, > bhi .L200 //, > > > Despite compiler option -mgeneral-regs-only: > > // -mfix-cortex-a53-835769 -mfix-cortex-a53-843419 -mgeneral-regs-only > // -mlittle-endian -mpc-relative-literal-loads -mstrict-align > (see attached assembly generated file) > That is the same compiler bug at work, I think. So we need to add -mgeneral-regs-only for this module as well. Perhaps we should simply set it globally? Leif?