From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x234.google.com (mail-io0-x234.google.com [IPv6:2607:f8b0:4001:c06::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 47B7281A5B for ; Fri, 10 Feb 2017 10:25:01 -0800 (PST) Received: by mail-io0-x234.google.com with SMTP id j13so56984583iod.3 for ; Fri, 10 Feb 2017 10:25:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=VYRPDK8emiV25MCngcocGbjkutEPmH/LC57Yc02hjxc=; b=gWxAetT/zpakTc+fq90zPUxd1eet2Ttp0/B7Cp+Mfc8h+ywCgYqF7LoAgKbPAMW+uB CouUmGM5HRI1dqEleSP+bs4JpyR1Mp2lpNvOz+5+qX7oGHXEi/Lf9vxYjMU7o+OsWKvO DuZaCIV4TGiq4ZTv5ZM5jquOcZhneXcBr3/d8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=VYRPDK8emiV25MCngcocGbjkutEPmH/LC57Yc02hjxc=; b=DC+diC+B0VzgxtkuBEWUiOedQEhPNRqdfH5eX9NGv2JNSCHx3TPo1czgIkq0JDFEJ/ qTRp+j98+zBm8A0PfMctm/lWPkzIaj3oP1InWXiIDNuVEVc/KN1+QwD+S0r7p4tFPjba Y3y9YVx/ieUFWeresdyF0EPbMLtSx+seHlfxRFhsGmnVM8hp0t22h6X+juoFX3E6pB0+ TQFvqUN6aCoHhtvmayzLGF9s1XdmTPehqAEDH5KOBYwIkKbAwVvKkn1+MmKEg/8Uerp7 UUH2ygp1sGJbEg9DixQan2IH/IphSBdesrIMSUV0mPq7sBoaqT4eIryZDG27spNojSNr YUcQ== X-Gm-Message-State: AMke39n/zOmrjCKAITQwQ0pRJ2uEls7X/sMLfZmhLh5hvfCB2YiWgMwjwiHK/0Yi3qf9TdtXmq0Jn8Kb30uSW120 X-Received: by 10.107.53.17 with SMTP id c17mr9243219ioa.45.1486751100680; Fri, 10 Feb 2017 10:25:00 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.144.139 with HTTP; Fri, 10 Feb 2017 10:25:00 -0800 (PST) In-Reply-To: <20170210181758.GQ16034@bivouac.eciton.net> References: <1486661891-7888-1-git-send-email-ard.biesheuvel@linaro.org> <1486661891-7888-2-git-send-email-ard.biesheuvel@linaro.org> <20170210181758.GQ16034@bivouac.eciton.net> From: Ard Biesheuvel Date: Fri, 10 Feb 2017 18:25:00 +0000 Message-ID: To: Leif Lindholm Cc: "edk2-devel@lists.01.org" , "Yao, Jiewen" , "Tian, Feng" , "Kinney, Michael D" , "Fan, Jeff" , "Zeng, Star" Subject: Re: [PATCH 1/4] ArmPkg/CpuDxe: Correct EFI_MEMORY_RO usage X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Feb 2017 18:25:01 -0000 Content-Type: text/plain; charset=UTF-8 On 10 February 2017 at 18:17, Leif Lindholm wrote: > On Thu, Feb 09, 2017 at 05:38:08PM +0000, Ard Biesheuvel wrote: >> From: Jiewen Yao >> >> Current Arm CpuDxe driver uses EFI_MEMORY_WP for write protection, >> according to UEFI spec, we should use EFI_MEMORY_RO for write protection. >> The EFI_MEMORY_WP is the cache attribute instead of memory attribute. >> >> Cc: Leif Lindholm >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Signed-off-by: Jiewen Yao >> >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Signed-off-by: Ard Biesheuvel > > No objections to this patch, but I would have expected it to be 4/4, > if it caused issues requiring the other 3 to be created? > Not quite: it is the feature itself that requires these fixes, and this patch actually makes sense as 1/4, since it removes uses of EFI_MEMORY_WP that are no longer appropriate. Implementing 2-4 with EFI_MEMORY_WP instead of EFI_MEMORY_RO and then changing it at the end would make no sense at all.