From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::242; helo=mail-it0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x242.google.com (mail-it0-x242.google.com [IPv6:2607:f8b0:4001:c0b::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7CAE6220C1C27 for ; Thu, 23 Nov 2017 02:15:00 -0800 (PST) Received: by mail-it0-x242.google.com with SMTP id n134so9729223itg.3 for ; Thu, 23 Nov 2017 02:19:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=4KGIk3OWjlYPAHFVKZQ5fuam1lx2xDbW4ejh+oOdrk4=; b=BXQUmsti4zEnMjXMOw0zrgQZ8poctHZk6P6SogR8Ay59L45ebivJeESxU/tn/+IozW DdqbMqIc+70yzEqCQ5lrwhNEF9k3Yi2rGUqdIqKn+RDVC5ra5ugAxUEUlucaBMvCVBXy Zqq4IC6zUDu54a8ThgXXHNEQX3L0Pnz9VOyE4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=4KGIk3OWjlYPAHFVKZQ5fuam1lx2xDbW4ejh+oOdrk4=; b=fcfq8Asrj2nXY5NNcSDbE4AzdTHuUPKE0AWIaeugQT9YyXv8IDX+c4pNQXUJGCxxK6 C6q7vOhHud7/nQVn+16oI6QnjSPfjxtZQPZoD61Rst5unDtu3vnjMd/LSywC3rpKb4n9 npwForKxgocShm2uK4ryYvXO4dOl7nFyp3WGVRPRDCdUJwfMZYvb+eeUnLmzGHaL6z5M gFIV5WV6axAUxl4DFGav6aAZJ3mt4WKl8XAQkyRSAQRZgrB3b0hoU3Bz8vcTnHYVOZPa ZOuJMqugBQqw9oDC7YXzCwYudvkEN10ao/oGKBUsHN0bEdyCD4JRYUwqaW4THrO7cIBY lcwA== X-Gm-Message-State: AJaThX4+QGRXGDtoEBIuT85uWKUznJ9bwOxGYXiK6/CrG85Ck5CHuRKd Z1k7bo+PPA9qF9jnRUxq4ylgpZJ/H9DOCid3RA2IUw== X-Google-Smtp-Source: AGs4zMZKFbaZ87oj2Fo16sXPImkUlMGehXAEh2foc7rRLVhrsADfX9NDF3Za74Q0e9SX+mUx6M/1KTHbyEa+TtRsSnc= X-Received: by 10.36.48.4 with SMTP id q4mr10803750itq.34.1511432356959; Thu, 23 Nov 2017 02:19:16 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.104.16 with HTTP; Thu, 23 Nov 2017 02:19:16 -0800 (PST) In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A14E1826B0@SHSMSX104.ccr.corp.intel.com> References: <20171121161037.26573-1-ard.biesheuvel@linaro.org> <4A89E2EF3DFEDB4C8BFDE51014F606A14E1826B0@SHSMSX104.ccr.corp.intel.com> From: Ard Biesheuvel Date: Thu, 23 Nov 2017 10:19:16 +0000 Message-ID: To: "Gao, Liming" Cc: "edk2-devel@lists.01.org" , "leif.lindholm@linaro.org" , "mw@semihalf.com" , "Zhu, Yonghong" , "daniel.thompson@linaro.org" Subject: Re: [PATCH] BaseTools/tools_def AARCH64 ARM: suppres PIE sections via linker script X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Nov 2017 10:15:00 -0000 Content-Type: text/plain; charset="UTF-8" On 23 November 2017 at 10:16, Gao, Liming wrote: > Ard: > Have you own GCC linker script? Is it not in BaseTools? > No it is just GccBase.lds like we use for PE/COFF binaries, but this patch uses it for .aslc files as well. >>-----Original Message----- >>From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org] >>Sent: Wednesday, November 22, 2017 12:11 AM >>To: edk2-devel@lists.01.org; leif.lindholm@linaro.org >>Cc: mw@semihalf.com; Zhu, Yonghong ; Gao, >>Liming ; daniel.thompson@linaro.org; Ard Biesheuvel >> >>Subject: [PATCH] BaseTools/tools_def AARCH64 ARM: suppres PIE sections >>via linker script >> >>Recent distro builds of GCC 6 enable PIE linking by default, and allow >>the previous behavior to be restored by passing the -no-pie command line >>argument. This was implemented by commits 1894a7c64c0a and 3380a591232d >>but unfortunately, it turns out that GCC 5 does not support this command >>line argument, and exits with an error. >> >>To avoid the need for yet another toolchain tag, to distinguish between >>GCC 5 and GCC 6, let's use our GCC linker scripts when building objects >>from .aslc files. This will ensure that the extra sections that are added >>by the PIE linker are discarded from the ELF binary, and so they will not >>corrupt the resulting .acpi file. >> >>This reverts >> >>1894a7c64c0a BaseTools/tools_def AARCH64 ARM: disable PIE linking >>3380a591232d BaseTools/tools_def AARCH64 ARM: disable PIE linking for .aslc >>sources >> >>Contributed-under: TianoCore Contribution Agreement 1.1 >>Signed-off-by: Ard Biesheuvel >>--- >> BaseTools/Conf/tools_def.template | 13 +++++++------ >> 1 file changed, 7 insertions(+), 6 deletions(-) >> >>diff --git a/BaseTools/Conf/tools_def.template >>b/BaseTools/Conf/tools_def.template >>index aebd7d558633..4d2a3b7dbe56 100755 >>--- a/BaseTools/Conf/tools_def.template >>+++ b/BaseTools/Conf/tools_def.template >>@@ -4356,9 +4356,10 @@ DEFINE GCC_IA32_X64_DLINK_COMMON = >>DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections >> DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib - >>Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) -Wl,- >>e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map >> DEFINE GCC_ARM_DLINK_FLAGS = >>DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20 >> DEFINE GCC_AARCH64_DLINK_FLAGS = >>DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20 >>+DEFINE GCC_ARM_AARCH64_ASLDLINK_FLAGS = -Wl,-- >>defsym=PECOFF_HEADER_SIZE=0 DEF(GCC_DLINK2_FLAGS_COMMON) -z >>common-page-size=0x20 >> DEFINE GCC_IA32_X64_ASLDLINK_FLAGS = >>DEF(GCC_IA32_X64_DLINK_COMMON) --entry _ReferenceAcpiTable -u >>$(IMAGE_ENTRY_POINT) >>-DEFINE GCC_ARM_ASLDLINK_FLAGS = DEF(GCC_ARM_DLINK_FLAGS) - >>Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) >>-DEFINE GCC_AARCH64_ASLDLINK_FLAGS = >>DEF(GCC_AARCH64_DLINK_FLAGS) -Wl,--entry,ReferenceAcpiTable -u >>$(IMAGE_ENTRY_POINT) >>+DEFINE GCC_ARM_ASLDLINK_FLAGS = DEF(GCC_ARM_DLINK_FLAGS) - >>Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) >>DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS) >>+DEFINE GCC_AARCH64_ASLDLINK_FLAGS = >>DEF(GCC_AARCH64_DLINK_FLAGS) -Wl,--entry,ReferenceAcpiTable -u >>$(IMAGE_ENTRY_POINT) DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS) >> DEFINE GCC_IA32_X64_DLINK_FLAGS = >>DEF(GCC_IA32_X64_DLINK_COMMON) --entry _$(IMAGE_ENTRY_POINT) -- >>file-alignment 0x20 --section-alignment 0x20 -Map >>$(DEST_DIR_DEBUG)/$(BASE_NAME).map >> DEFINE GCC_IPF_DLINK_FLAGS = -nostdlib -O2 --gc-sections --dll -static -- >>entry $(IMAGE_ENTRY_POINT) --undefined $(IMAGE_ENTRY_POINT) -Map >>$(DEST_DIR_DEBUG)/$(BASE_NAME).map >> DEFINE GCC_IPF_OBJCOPY_FLAGS = -I elf64-ia64-little -O efi-bsdrv-ia64 >>@@ -4494,12 +4495,12 @@ DEFINE GCC5_ARM_CC_FLAGS = >>DEF(GCC49_ARM_CC_FLAGS) >> DEFINE GCC5_ARM_CC_XIPFLAGS = DEF(GCC49_ARM_CC_XIPFLAGS) >> DEFINE GCC5_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) >> DEFINE GCC5_AARCH64_CC_XIPFLAGS = >>DEF(GCC49_AARCH64_CC_XIPFLAGS) >>-DEFINE GCC5_ARM_DLINK_FLAGS = DEF(GCC49_ARM_DLINK_FLAGS) - >>no-pie >>+DEFINE GCC5_ARM_DLINK_FLAGS = DEF(GCC49_ARM_DLINK_FLAGS) >> DEFINE GCC5_ARM_DLINK2_FLAGS = DEF(GCC49_ARM_DLINK2_FLAGS) - >>Wno-error >>-DEFINE GCC5_AARCH64_DLINK_FLAGS = >>DEF(GCC49_AARCH64_DLINK_FLAGS) -no-pie >>+DEFINE GCC5_AARCH64_DLINK_FLAGS = >>DEF(GCC49_AARCH64_DLINK_FLAGS) >> DEFINE GCC5_AARCH64_DLINK2_FLAGS = >>DEF(GCC49_AARCH64_DLINK2_FLAGS) -Wno-error >>-DEFINE GCC5_ARM_ASLDLINK_FLAGS = >>DEF(GCC49_ARM_ASLDLINK_FLAGS) -no-pie >>-DEFINE GCC5_AARCH64_ASLDLINK_FLAGS = >>DEF(GCC49_AARCH64_ASLDLINK_FLAGS) -no-pie >>+DEFINE GCC5_ARM_ASLDLINK_FLAGS = >>DEF(GCC49_ARM_ASLDLINK_FLAGS) >>+DEFINE GCC5_AARCH64_ASLDLINK_FLAGS = >>DEF(GCC49_AARCH64_ASLDLINK_FLAGS) >> >> >>########################################################### >>######################### >> # >>-- >>2.11.0 >