From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::243; helo=mail-io0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x243.google.com (mail-io0-x243.google.com [IPv6:2607:f8b0:4001:c06::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 65E35210C1B95 for ; Wed, 25 Jul 2018 03:51:20 -0700 (PDT) Received: by mail-io0-x243.google.com with SMTP id l14-v6so5919284iob.7 for ; Wed, 25 Jul 2018 03:51:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=GWtwlxq1LWPBOXITpRWOGfMFk1lPTIOQeFK9Fjasf2E=; b=HxBvMwuJ62SRXVdOttgghbCcVfcdKTCC3izvIT3OOBlPffrWvTujyikwP2FBtJLbMh ZFAM/CgU+KpK+S/WtU8hn8Ki6sG+lqxtcDDGBZC2QkLw7YCy1v2U15FxrJQmXw48/IDK +OWT+QIyblwlFCvdvh2VGOKO7ysKqalhSslkQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=GWtwlxq1LWPBOXITpRWOGfMFk1lPTIOQeFK9Fjasf2E=; b=A2ETOnxrhxj+nPQ1ZUoqVy1uCu0jL7fGoOnFEZjn8SnP0vGSuY6TP4Ll9uJ3Tth+vV PV/G4cwqCsIzjU2xGZIDosgYKX1JZjC4e7cLKyRe3URwbFIpLY165pcFbd1se6X2eNDq 1S9MbtsrcpJEVN/896bzQoeppYOi06DG0VqQODmlYuwIe1QjMnq2DA7FL/z62Q08JNKJ UUOlzom4Ebx3c7OCTwA8InmCZsjBy6yrWFJdDxXOxGTQ3jZ1iaw5MdbNxytlWrJTTyqO VfbT5QywnFvP0ckF4HUsX20LJW6u31GWWF02Z0nDVY+Qe/YPU8PJpakNVuVUGPC5gyFa H3GQ== X-Gm-Message-State: AOUpUlEOIu94F1tNLUNJm/8bSw5eG7xnmxqZw6wqVu1mkedOn36ApX33 3CdcTTXhQVoZDI+2IrVA8+dNziGtwhyc3UUyegTS1g== X-Google-Smtp-Source: AAOMgpcMA9tUBvLTgG47S0jppvJLN+UkvNz4qh/mcvl5J58CQ8zxjtr2axXv2xjIZNTsr6kL9OeFb6m/AEwPU5z9ddU= X-Received: by 2002:a6b:be83:: with SMTP id o125-v6mr16204595iof.173.1532515880276; Wed, 25 Jul 2018 03:51:20 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:ac05:0:0:0:0:0 with HTTP; Wed, 25 Jul 2018 03:51:19 -0700 (PDT) In-Reply-To: <20180713081540.8414-5-ming.huang@linaro.org> References: <20180713081540.8414-1-ming.huang@linaro.org> <20180713081540.8414-5-ming.huang@linaro.org> From: Ard Biesheuvel Date: Wed, 25 Jul 2018 12:51:19 +0200 Message-ID: To: Ming Huang Cc: Leif Lindholm , linaro-uefi , "edk2-devel@lists.01.org" , Graeme Gregory , guoheyi@huawei.com, wanghuiqiang , huangming , Jason Zhang , huangdaode@hisilicon.com, John Garry , Heyi Guo Subject: Re: [PATCH edk2-platforms v3 4/6] Hisilicon/D05: Add PlatformMiscDxe driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Jul 2018 10:51:21 -0000 Content-Type: text/plain; charset="UTF-8" On 13 July 2018 at 10:15, Ming Huang wrote: > Fix the issue of onboard Nic not work kerenl with AMD GPU and > NVME SSD in board. The GPU don't support 64 MSI, so need to > allocate INTx, but the default interrupt number 255 is invalid, > so Change all the PCI Device interrupt number to 0. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang > Signed-off-by: Heyi Guo I don't understand why this issue is specific to this platform. Can you explain in more detail what the failure mode is, and why setting the PCI interrupt line is necessary here, while it doesn't seem to be on other platforms, even when falling back to INTx interrupts? > --- > Platform/Hisilicon/D05/D05.dsc | 1 + > Platform/Hisilicon/D05/D05.fdf | 1 + > Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c | 99 ++++++++++++++++++++ > Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf | 47 ++++++++++ > 4 files changed, 148 insertions(+) > > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc > index b6e1a9d98a..0e6d5912a0 100644 > --- a/Platform/Hisilicon/D05/D05.dsc > +++ b/Platform/Hisilicon/D05/D05.dsc > @@ -629,6 +629,7 @@ > > > Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf > + Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf > > # > # Memory test > diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf > index 4503776d63..61e8d907f9 100644 > --- a/Platform/Hisilicon/D05/D05.fdf > +++ b/Platform/Hisilicon/D05/D05.fdf > @@ -354,6 +354,7 @@ READ_LOCK_STATUS = TRUE > INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf > INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf > INF Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf > + INF Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf > > INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > > diff --git a/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c b/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c > new file mode 100644 > index 0000000000..8519b7139d > --- /dev/null > +++ b/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c > @@ -0,0 +1,99 @@ > +/** @file > +* > +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. > +* Copyright (c) 2016, Linaro Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include > +#include > +#include > +#include > +#include > + > +VOID > +SetIntLine ( > + ) > +{ > + EFI_STATUS Status; > + UINTN HandleIndex; > + EFI_HANDLE *HandleBuffer; > + UINTN HandleCount; > + EFI_PCI_IO_PROTOCOL *PciIo; > + UINT8 INTLine; > + UINTN Segment; > + UINTN Bus; > + UINTN Device; > + UINTN Fun; > + > + Status = gBS->LocateHandleBuffer ( > + ByProtocol, > + &gEfiPciIoProtocolGuid, > + NULL, > + &HandleCount, > + &HandleBuffer > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, " Locate gEfiPciIoProtocol Failed.\n")); > + gBS->FreePool ((VOID *)HandleBuffer); > + return; > + } > + > + for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) { > + Status = gBS->HandleProtocol ( > + HandleBuffer[HandleIndex], > + &gEfiPciIoProtocolGuid, > + (VOID **)&PciIo > + ); > + if (EFI_ERROR (Status)) { > + continue; > + } > + > + INTLine = 0; > + (VOID)PciIo->Pci.Write ( > + PciIo, > + EfiPciIoWidthUint8, > + PCI_INT_LINE_OFFSET, > + 1, > + &INTLine); > + (VOID)PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Fun); > + DEBUG ((DEBUG_INFO, "Set BDF(%x-%x-%x) IntLine to 0\n", Bus, Device, Fun)); > + } > + > + gBS->FreePool ((VOID *)HandleBuffer); > + return; > +} > + > +EFI_STATUS > +EFIAPI > +PlatformMiscDxeEntry ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status; > + EFI_EVENT Event; > + > + Status = gBS->CreateEventEx ( > + EVT_NOTIFY_SIGNAL, > + TPL_CALLBACK, > + SetIntLine, > + NULL, > + &gEfiEventReadyToBootGuid, > + &Event > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Create event for SetIntLine, %r!\n", Status)); > + } > + > + return EFI_SUCCESS; > +} > + > diff --git a/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf b/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf > new file mode 100644 > index 0000000000..0b365e7a53 > --- /dev/null > +++ b/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf > @@ -0,0 +1,47 @@ > +#/** @file > +# > +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. > +# Copyright (c) 2016, Linaro Limited. All rights reserved. > +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD License > +# which accompanies this distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +#**/ > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = PlatformMiscDxe > + FILE_GUID = a48f7a09-253f-468b-87c6-caf78baf47bb > + MODULE_TYPE = DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT = PlatformMiscDxeEntry > + > +[Sources.common] > + PlatformMiscDxe.c > + > +[Packages] > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Silicon/Hisilicon/HisiPkg.dec > + > +[Guids] > + gEfiEventReadyToBootGuid > + > +[Protocols] > + gEfiPciIoProtocolGuid > + > +[LibraryClasses] > + BaseLib > + DebugLib > + UefiBootServicesTableLib > + UefiDriverEntryPoint > + > +[FixedPcd] > + > +[Depex] > + TRUE > -- > 2.17.0 >