From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::242; helo=mail-io0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x242.google.com (mail-io0-x242.google.com [IPv6:2607:f8b0:4001:c06::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 07D2D210C9994 for ; Sun, 10 Jun 2018 10:51:57 -0700 (PDT) Received: by mail-io0-x242.google.com with SMTP id d22-v6so21346159iof.13 for ; Sun, 10 Jun 2018 10:51:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=4Vo1ZZIjR64QhsIUAXNKYmqKTICdYu5zFyEJw9KvwzQ=; b=eeFlAi+G2+Nq4V0QAKBnXEA0VFuD6RNyKcdSQS8HgYguOw5FFyPgRgBrNkZfRMrzFx Qx3HmwmCOoN89RkvmzPkklwzGNlWeC63Z7SAKG/oQAZP9fEwrIte8fUzSEoMub/6OJlo HaqWWCvrOBt+8FsT+ocaieEYRjUcEo659pl0s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=4Vo1ZZIjR64QhsIUAXNKYmqKTICdYu5zFyEJw9KvwzQ=; b=EPqcDvpxlPj8OaIMAlf/3fQp0Kf6vxMsEy4j1pDrwGja5xCJim/3PdPByDRMV3Ic/G pLaWz3uFZ6DbewISZmFeZ/nMKhcCQVaF6HCPG977Jt2tE0c59RsO+SdDuSUuFx3EuM3I TLB7oO7FmVCs6+5zWEI1W7jWK4WrCntg+8ocCGMLjDclbutGIkeq23MAMsdsdqrzoxW5 23hDXyOX6w9uIvy/WjVYJBTMUIc5iSU5B9yIPUkkD9eDOfXtUwE+gfSXbPxFE6QfCfRJ m2/aiWwLRoeR3kzp+UTWP6kKgNItfyV4FtDlwDQJHcrBODZ5rFW5L1f856Y0kjXzg1GS bMpQ== X-Gm-Message-State: APt69E15I3ZM/gXjF6f1BK7RImRyyhLx/E/9iwZB8GhaaCT8I2tjw66d Kvvq3EnycIROfq9v7INGtFqAFY44uMxOxrPV5fVzBg== X-Google-Smtp-Source: ADUXVKJpAgp81lxO7hhZnTWo6GONVs0tLAbEnDcl5+YqHhVk1NAlLiC0xdINKJ2CH3F52eZGm1CGeRpI9G8Z6kx9vlY= X-Received: by 2002:a6b:520d:: with SMTP id g13-v6mr11046372iob.60.1528653116675; Sun, 10 Jun 2018 10:51:56 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:bbc7:0:0:0:0:0 with HTTP; Sun, 10 Jun 2018 10:51:56 -0700 (PDT) In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A14E294E1F@SHSMSX104.ccr.corp.intel.com> References: <20180607104645.22278-1-ard.biesheuvel@linaro.org> <4A89E2EF3DFEDB4C8BFDE51014F606A14E294430@SHSMSX104.ccr.corp.intel.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14E294E1F@SHSMSX104.ccr.corp.intel.com> From: Ard Biesheuvel Date: Sun, 10 Jun 2018 19:51:56 +0200 Message-ID: To: "Gao, Liming" Cc: Laszlo Ersek , "Kinney, Michael D" , "edk2-devel@lists.01.org" , "leif.lindholm@linaro.org" Subject: Re: [PATCH] MdePkg/BaseIoLibIntrinsic: make BaseIoLibIntrinsic safe for ArmVirt/KVM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 10 Jun 2018 17:51:58 -0000 Content-Type: text/plain; charset="UTF-8" On 8 June 2018 at 18:38, Gao, Liming wrote: > Laszlo: > I get your point. I am OK to add this library instance in MdePkg for code sharing. > > Ard: > Have you plan to make this library instance pass VS2017 tool chain? > Good point. I will add that. > Thanks > Liming >> -----Original Message----- >> From: Laszlo Ersek [mailto:lersek@redhat.com] >> Sent: Friday, June 8, 2018 12:56 AM >> To: Ard Biesheuvel ; Gao, Liming >> Cc: edk2-devel@lists.01.org; leif.lindholm@linaro.org; Kinney, Michael D >> Subject: Re: [PATCH] MdePkg/BaseIoLibIntrinsic: make BaseIoLibIntrinsic safe for ArmVirt/KVM >> >> On 06/07/18 17:09, Ard Biesheuvel wrote: >> > On 7 June 2018 at 17:08, Gao, Liming wrote: >> >> Ard: >> >> If this library instance is specific to ARM emulator with KVM, how about add it into ArmVirtPkg? >> >> >> > >> > Laszlo, do you want to take this question? >> >> Certainly. >> >> Liming, in commit b6d11d7c4678, we added "BaseIoLibIntrinsicSev.inf" to >> "MdePkg/Library/BaseIoLibIntrinsic", with some custom Ia32 and X64 NASM >> files, but mostly reusing the large existent files ("IoLibMmioBuffer.c", >> "IoHighLevel.c" etc). >> >> That library instance (and the NASM customizations) target AMD SEV; that >> is, when the code runs in a virtual machine for which AMD Secure >> Encrypted Virtualization is enabled. The NASM code uses CPUID to >> dynamically determine whether it runs in a SEV guest, or in a normal >> guest, and in the former case, it avoids using the REP prefix in the >> IoFifo routines (it uses open-coded LOOPs). >> >> The "BaseIoLibIntrinsicSev.inf" instance is only ever used in OvmfPkg >> (it only makes sense in virtual machines), but the consensus back then >> was to add the lib instance to MdePkg. >> >> >> This time, Ard has already implemented (and posted) the IoLib instance >> that we need for ARM KVM such that it lands under ArmVirtPkg -- however, >> that library instance duplicates a huge amount of code, un-changed, from >> "BaseIoLibIntrinsic" (such as "IoLibMmioBuffer.c", "IoHighLevel.c"). I >> suggested that Ard instead post the new library instance as a new INF >> file (plus some assembly files) for BaseIoLibIntrinsic itself, because: >> (a) this way we avoid code duplication, and (b) that's exactly what we >> did -- for another virtualization-only use case -- in commit >> b6d11d7c4678 earlier. >> >> If you'd like us to add the code to ArmVirtPkg, I don't think that's the >> right or consequent action, but technically, we can simply fall back to >> the ArmVirtPkg patches that Ard already wrote and posted. >> >> Thanks, >> Laszlo >> >> >>> -----Original Message----- >> >>> From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org] >> >>> Sent: Thursday, June 7, 2018 6:47 PM >> >>> To: edk2-devel@lists.01.org >> >>> Cc: lersek@redhat.com; leif.lindholm@linaro.org; Gao, Liming ; Kinney, Michael D >> >>> ; Ard Biesheuvel >> >>> Subject: [PATCH] MdePkg/BaseIoLibIntrinsic: make BaseIoLibIntrinsic safe for ArmVirt/KVM >> >>> >> >>> KVM on ARM refuses to decode load/store instructions used to perform >> >>> I/O to emulated devices, and instead relies on the exception syndrome >> >>> information to describe the operand register, access size, etc. >> >>> This is only possible for instructions that have a single input/output >> >>> register (as opposed to ones that increment the offset register, or >> >>> load/store pair instructions, etc). Otherwise, QEMU crashes with the >> >>> following error >> >>> >> >>> error: kvm run failed Function not implemented >> >>> R00=01010101 R01=00000008 R02=00000048 R03=08000820 >> >>> R04=00000120 R05=7faaa0e0 R06=7faaa0dc R07=7faaa0e8 >> >>> R08=7faaa0ec R09=7faaa088 R10=000000ff R11=00000080 >> >>> R12=ff000000 R13=7fccfe08 R14=7faa835f R15=7faa887c >> >>> PSR=800001f3 N--- T svc32 >> >>> QEMU: Terminated >> >>> >> >>> and KVM produces a warning such as the following in the kernel log >> >>> >> >>> kvm [17646]: load/store instruction decoding not implemented >> >>> >> >>> The IoLib implementation provided by MdePkg/Library/BaseIoLibIntrinsic >> >>> is based on C code, and when LTO is in effect, the MMIO accesses could >> >>> be merged with, e.g., manipulations of the loop counter, producing >> >>> opcodes that KVM does not support for emulated MMIO. >> >>> >> >>> So let's add a special ArmVirt flavor of this library that implements >> >>> that actual load/store operations in assembler, ensuring that the >> >>> instructions involved can be emulated by KVM. >> >>> >> >>> Contributed-under: TianoCore Contribution Agreement 1.1 >> >>> Signed-off-by: Ard Biesheuvel >> >>> --- >> >>> ArmVirtPkg/ArmVirt.dsc.inc | 2 +- >> >>> MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S | 164 +++++ >> >>> MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S | 161 +++++ >> >>> MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm | 165 +++++ >> >>> MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf | 50 ++ >> >>> MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c | 641 ++++++++++++++++++++ >> >>> 6 files changed, 1182 insertions(+), 1 deletion(-) >> >>> >> >>> diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc >> >>> index 766e4f598a07..7464ac70ed1b 100644 >> >>> --- a/ArmVirtPkg/ArmVirt.dsc.inc >> >>> +++ b/ArmVirtPkg/ArmVirt.dsc.inc >> >>> @@ -41,7 +41,7 @@ [LibraryClasses.common] >> >>> PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf >> >>> PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf >> >>> PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf >> >>> - IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf >> >>> + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf >> >>> UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf >> >>> CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf >> >>> >> >>> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S >> b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S >> >>> new file mode 100644 >> >>> index 000000000000..47be68a3e783 >> >>> --- /dev/null >> >>> +++ b/MdePkg/Library/BaseIoLibIntrinsic/AArch64/ArmVirtMmio.S >> >>> @@ -0,0 +1,164 @@ >> >>> +# >> >>> +# Copyright (c) 2014-2018, Linaro Limited. All rights reserved. >> >>> +# >> >>> +# This program and the accompanying materials are licensed and made available >> >>> +# under the terms and conditions of the BSD License which accompanies this >> >>> +# distribution. The full text of the license may be found at >> >>> +# http://opensource.org/licenses/bsd-license.php >> >>> +# >> >>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> >>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> >>> +# >> >>> +# >> >>> + >> >>> +.text >> >>> +.align 3 >> >>> + >> >>> +GCC_ASM_EXPORT(MmioRead8Internal) >> >>> +GCC_ASM_EXPORT(MmioWrite8Internal) >> >>> +GCC_ASM_EXPORT(MmioRead16Internal) >> >>> +GCC_ASM_EXPORT(MmioWrite16Internal) >> >>> +GCC_ASM_EXPORT(MmioRead32Internal) >> >>> +GCC_ASM_EXPORT(MmioWrite32Internal) >> >>> +GCC_ASM_EXPORT(MmioRead64Internal) >> >>> +GCC_ASM_EXPORT(MmioWrite64Internal) >> >>> + >> >>> +// >> >>> +// Reads an 8-bit MMIO register. >> >>> +// >> >>> +// Reads the 8-bit MMIO register specified by Address. The 8-bit read value is >> >>> +// returned. This function must guarantee that all MMIO read and write >> >>> +// operations are serialized. >> >>> +// >> >>> +// If 8-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to read. >> >>> +// >> >>> +// @return The value read. >> >>> +// >> >>> +ASM_PFX(MmioRead8Internal): >> >>> + ldrb w0, [x0] >> >>> + dmb ld >> >>> + ret >> >>> + >> >>> +// >> >>> +// Writes an 8-bit MMIO register. >> >>> +// >> >>> +// Writes the 8-bit MMIO register specified by Address with the value specified >> >>> +// by Value and returns Value. This function must guarantee that all MMIO read >> >>> +// and write operations are serialized. >> >>> +// >> >>> +// If 8-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to write. >> >>> +// @param Value The value to write to the MMIO register. >> >>> +// >> >>> +ASM_PFX(MmioWrite8Internal): >> >>> + dmb st >> >>> + strb w1, [x0] >> >>> + ret >> >>> + >> >>> +// >> >>> +// Reads a 16-bit MMIO register. >> >>> +// >> >>> +// Reads the 16-bit MMIO register specified by Address. The 16-bit read value is >> >>> +// returned. This function must guarantee that all MMIO read and write >> >>> +// operations are serialized. >> >>> +// >> >>> +// If 16-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to read. >> >>> +// >> >>> +// @return The value read. >> >>> +// >> >>> +ASM_PFX(MmioRead16Internal): >> >>> + ldrh w0, [x0] >> >>> + dmb ld >> >>> + ret >> >>> + >> >>> +// >> >>> +// Writes a 16-bit MMIO register. >> >>> +// >> >>> +// Writes the 16-bit MMIO register specified by Address with the value specified >> >>> +// by Value and returns Value. This function must guarantee that all MMIO read >> >>> +// and write operations are serialized. >> >>> +// >> >>> +// If 16-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to write. >> >>> +// @param Value The value to write to the MMIO register. >> >>> +// >> >>> +ASM_PFX(MmioWrite16Internal): >> >>> + dmb st >> >>> + strh w1, [x0] >> >>> + ret >> >>> + >> >>> +// >> >>> +// Reads a 32-bit MMIO register. >> >>> +// >> >>> +// Reads the 32-bit MMIO register specified by Address. The 32-bit read value is >> >>> +// returned. This function must guarantee that all MMIO read and write >> >>> +// operations are serialized. >> >>> +// >> >>> +// If 32-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to read. >> >>> +// >> >>> +// @return The value read. >> >>> +// >> >>> +ASM_PFX(MmioRead32Internal): >> >>> + ldr w0, [x0] >> >>> + dmb ld >> >>> + ret >> >>> + >> >>> +// >> >>> +// Writes a 32-bit MMIO register. >> >>> +// >> >>> +// Writes the 32-bit MMIO register specified by Address with the value specified >> >>> +// by Value and returns Value. This function must guarantee that all MMIO read >> >>> +// and write operations are serialized. >> >>> +// >> >>> +// If 32-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to write. >> >>> +// @param Value The value to write to the MMIO register. >> >>> +// >> >>> +ASM_PFX(MmioWrite32Internal): >> >>> + dmb st >> >>> + str w1, [x0] >> >>> + ret >> >>> + >> >>> +// >> >>> +// Reads a 64-bit MMIO register. >> >>> +// >> >>> +// Reads the 64-bit MMIO register specified by Address. The 64-bit read value is >> >>> +// returned. This function must guarantee that all MMIO read and write >> >>> +// operations are serialized. >> >>> +// >> >>> +// If 64-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to read. >> >>> +// >> >>> +// @return The value read. >> >>> +// >> >>> +ASM_PFX(MmioRead64Internal): >> >>> + ldr x0, [x0] >> >>> + dmb ld >> >>> + ret >> >>> + >> >>> +// >> >>> +// Writes a 64-bit MMIO register. >> >>> +// >> >>> +// Writes the 64-bit MMIO register specified by Address with the value specified >> >>> +// by Value and returns Value. This function must guarantee that all MMIO read >> >>> +// and write operations are serialized. >> >>> +// >> >>> +// If 64-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to write. >> >>> +// @param Value The value to write to the MMIO register. >> >>> +// >> >>> +ASM_PFX(MmioWrite64Internal): >> >>> + dmb st >> >>> + str x1, [x0] >> >>> + ret >> >>> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S >> >>> new file mode 100644 >> >>> index 000000000000..438805ca7c24 >> >>> --- /dev/null >> >>> +++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S >> >>> @@ -0,0 +1,161 @@ >> >>> +# >> >>> +# Copyright (c) 2014-2018, Linaro Limited. All rights reserved. >> >>> +# >> >>> +# This program and the accompanying materials are licensed and made available >> >>> +# under the terms and conditions of the BSD License which accompanies this >> >>> +# distribution. The full text of the license may be found at >> >>> +# http://opensource.org/licenses/bsd-license.php >> >>> +# >> >>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> >>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> >>> +# >> >>> +# >> >>> + >> >>> +GCC_ASM_EXPORT(MmioRead8Internal) >> >>> +GCC_ASM_EXPORT(MmioWrite8Internal) >> >>> +GCC_ASM_EXPORT(MmioRead16Internal) >> >>> +GCC_ASM_EXPORT(MmioWrite16Internal) >> >>> +GCC_ASM_EXPORT(MmioRead32Internal) >> >>> +GCC_ASM_EXPORT(MmioWrite32Internal) >> >>> +GCC_ASM_EXPORT(MmioRead64Internal) >> >>> +GCC_ASM_EXPORT(MmioWrite64Internal) >> >>> + >> >>> +// >> >>> +// Reads an 8-bit MMIO register. >> >>> +// >> >>> +// Reads the 8-bit MMIO register specified by Address. The 8-bit read value is >> >>> +// returned. This function must guarantee that all MMIO read and write >> >>> +// operations are serialized. >> >>> +// >> >>> +// If 8-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to read. >> >>> +// >> >>> +// @return The value read. >> >>> +// >> >>> +ASM_PFX(MmioRead8Internal): >> >>> + ldrb r0, [r0] >> >>> + dmb >> >>> + bx lr >> >>> + >> >>> +// >> >>> +// Writes an 8-bit MMIO register. >> >>> +// >> >>> +// Writes the 8-bit MMIO register specified by Address with the value specified >> >>> +// by Value and returns Value. This function must guarantee that all MMIO read >> >>> +// and write operations are serialized. >> >>> +// >> >>> +// If 8-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to write. >> >>> +// @param Value The value to write to the MMIO register. >> >>> +// >> >>> +ASM_PFX(MmioWrite8Internal): >> >>> + dmb st >> >>> + strb r1, [r0] >> >>> + bx lr >> >>> + >> >>> +// >> >>> +// Reads a 16-bit MMIO register. >> >>> +// >> >>> +// Reads the 16-bit MMIO register specified by Address. The 16-bit read value is >> >>> +// returned. This function must guarantee that all MMIO read and write >> >>> +// operations are serialized. >> >>> +// >> >>> +// If 16-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to read. >> >>> +// >> >>> +// @return The value read. >> >>> +// >> >>> +ASM_PFX(MmioRead16Internal): >> >>> + ldrh r0, [r0] >> >>> + dmb >> >>> + bx lr >> >>> + >> >>> +// >> >>> +// Writes a 16-bit MMIO register. >> >>> +// >> >>> +// Writes the 16-bit MMIO register specified by Address with the value specified >> >>> +// by Value and returns Value. This function must guarantee that all MMIO read >> >>> +// and write operations are serialized. >> >>> +// >> >>> +// If 16-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to write. >> >>> +// @param Value The value to write to the MMIO register. >> >>> +// >> >>> +ASM_PFX(MmioWrite16Internal): >> >>> + dmb st >> >>> + strh r1, [r0] >> >>> + bx lr >> >>> + >> >>> +// >> >>> +// Reads a 32-bit MMIO register. >> >>> +// >> >>> +// Reads the 32-bit MMIO register specified by Address. The 32-bit read value is >> >>> +// returned. This function must guarantee that all MMIO read and write >> >>> +// operations are serialized. >> >>> +// >> >>> +// If 32-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to read. >> >>> +// >> >>> +// @return The value read. >> >>> +// >> >>> +ASM_PFX(MmioRead32Internal): >> >>> + ldr r0, [r0] >> >>> + dmb >> >>> + bx lr >> >>> + >> >>> +// >> >>> +// Writes a 32-bit MMIO register. >> >>> +// >> >>> +// Writes the 32-bit MMIO register specified by Address with the value specified >> >>> +// by Value and returns Value. This function must guarantee that all MMIO read >> >>> +// and write operations are serialized. >> >>> +// >> >>> +// If 32-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to write. >> >>> +// @param Value The value to write to the MMIO register. >> >>> +// >> >>> +ASM_PFX(MmioWrite32Internal): >> >>> + dmb st >> >>> + str r1, [r0] >> >>> + bx lr >> >>> + >> >>> +// >> >>> +// Reads a 64-bit MMIO register. >> >>> +// >> >>> +// Reads the 64-bit MMIO register specified by Address. The 64-bit read value is >> >>> +// returned. This function must guarantee that all MMIO read and write >> >>> +// operations are serialized. >> >>> +// >> >>> +// If 64-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to read. >> >>> +// >> >>> +// @return The value read. >> >>> +// >> >>> +ASM_PFX(MmioRead64Internal): >> >>> + ldrd r0, r1, [r0] >> >>> + dmb >> >>> + bx lr >> >>> + >> >>> +// >> >>> +// Writes a 64-bit MMIO register. >> >>> +// >> >>> +// Writes the 64-bit MMIO register specified by Address with the value specified >> >>> +// by Value and returns Value. This function must guarantee that all MMIO read >> >>> +// and write operations are serialized. >> >>> +// >> >>> +// If 64-bit MMIO register operations are not supported, then ASSERT(). >> >>> +// >> >>> +// @param Address The MMIO register to write. >> >>> +// @param Value The value to write to the MMIO register. >> >>> +// >> >>> +ASM_PFX(MmioWrite64Internal): >> >>> + dmb st >> >>> + strd r2, r3, [r0] >> >>> + bx lr >> >>> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm >> b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm >> >>> new file mode 100644 >> >>> index 000000000000..82add82f800a >> >>> --- /dev/null >> >>> +++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm >> >>> @@ -0,0 +1,165 @@ >> >>> +; >> >>> +; Copyright (c) 2014-2018, Linaro Limited. All rights reserved. >> >>> +; >> >>> +; This program and the accompanying materials are licensed and made available >> >>> +; under the terms and conditions of the BSD License which accompanies this >> >>> +; distribution. The full text of the license may be found at >> >>> +; http:;opensource.org/licenses/bsd-license.php >> >>> +; >> >>> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> >>> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> >>> +; >> >>> + >> >>> + >> >>> +AREA IoLibMmio, CODE, READONLY >> >>> + >> >>> +EXPORT MmioRead8Internal >> >>> +EXPORT MmioWrite8Internal >> >>> +EXPORT MmioRead16Internal >> >>> +EXPORT MmioWrite16Internal >> >>> +EXPORT MmioRead32Internal >> >>> +EXPORT MmioWrite32Internal >> >>> +EXPORT MmioRead64Internal >> >>> +EXPORT MmioWrite64Internal >> >>> + >> >>> +; >> >>> +; Reads an 8-bit MMIO register. >> >>> +; >> >>> +; Reads the 8-bit MMIO register specified by Address. The 8-bit read value is >> >>> +; returned. This function must guarantee that all MMIO read and write >> >>> +; operations are serialized. >> >>> +; >> >>> +; If 8-bit MMIO register operations are not supported, then ASSERT(). >> >>> +; >> >>> +; @param Address The MMIO register to read. >> >>> +; >> >>> +; @return The value read. >> >>> +; >> >>> +MmioRead8Internal >> >>> + ldrb r0, [r0] >> >>> + dmb >> >>> + bx lr >> >>> + >> >>> +; >> >>> +; Writes an 8-bit MMIO register. >> >>> +; >> >>> +; Writes the 8-bit MMIO register specified by Address with the value specified >> >>> +; by Value and returns Value. This function must guarantee that all MMIO read >> >>> +; and write operations are serialized. >> >>> +; >> >>> +; If 8-bit MMIO register operations are not supported, then ASSERT(). >> >>> +; >> >>> +; @param Address The MMIO register to write. >> >>> +; @param Value The value to write to the MMIO register. >> >>> +; >> >>> +MmioWrite8Internal >> >>> + dmb st >> >>> + strb r1, [r0] >> >>> + bx lr >> >>> + >> >>> +; >> >>> +; Reads a 16-bit MMIO register. >> >>> +; >> >>> +; Reads the 16-bit MMIO register specified by Address. The 16-bit read value is >> >>> +; returned. This function must guarantee that all MMIO read and write >> >>> +; operations are serialized. >> >>> +; >> >>> +; If 16-bit MMIO register operations are not supported, then ASSERT(). >> >>> +; >> >>> +; @param Address The MMIO register to read. >> >>> +; >> >>> +; @return The value read. >> >>> +; >> >>> +MmioRead16Internal >> >>> + ldrh r0, [r0] >> >>> + dmb >> >>> + bx lr >> >>> + >> >>> +; >> >>> +; Writes a 16-bit MMIO register. >> >>> +; >> >>> +; Writes the 16-bit MMIO register specified by Address with the value specified >> >>> +; by Value and returns Value. This function must guarantee that all MMIO read >> >>> +; and write operations are serialized. >> >>> +; >> >>> +; If 16-bit MMIO register operations are not supported, then ASSERT(). >> >>> +; >> >>> +; @param Address The MMIO register to write. >> >>> +; @param Value The value to write to the MMIO register. >> >>> +; >> >>> +MmioWrite16Internal >> >>> + dmb st >> >>> + strh r1, [r0] >> >>> + bx lr >> >>> + >> >>> +; >> >>> +; Reads a 32-bit MMIO register. >> >>> +; >> >>> +; Reads the 32-bit MMIO register specified by Address. The 32-bit read value is >> >>> +; returned. This function must guarantee that all MMIO read and write >> >>> +; operations are serialized. >> >>> +; >> >>> +; If 32-bit MMIO register operations are not supported, then ASSERT(). >> >>> +; >> >>> +; @param Address The MMIO register to read. >> >>> +; >> >>> +; @return The value read. >> >>> +; >> >>> +MmioRead32Internal >> >>> + ldr r0, [r0] >> >>> + dmb >> >>> + bx lr >> >>> + >> >>> +; >> >>> +; Writes a 32-bit MMIO register. >> >>> +; >> >>> +; Writes the 32-bit MMIO register specified by Address with the value specified >> >>> +; by Value and returns Value. This function must guarantee that all MMIO read >> >>> +; and write operations are serialized. >> >>> +; >> >>> +; If 32-bit MMIO register operations are not supported, then ASSERT(). >> >>> +; >> >>> +; @param Address The MMIO register to write. >> >>> +; @param Value The value to write to the MMIO register. >> >>> +; >> >>> +MmioWrite32Internal >> >>> + dmb st >> >>> + str r1, [r0] >> >>> + bx lr >> >>> + >> >>> +; >> >>> +; Reads a 64-bit MMIO register. >> >>> +; >> >>> +; Reads the 64-bit MMIO register specified by Address. The 64-bit read value is >> >>> +; returned. This function must guarantee that all MMIO read and write >> >>> +; operations are serialized. >> >>> +; >> >>> +; If 64-bit MMIO register operations are not supported, then ASSERT(). >> >>> +; >> >>> +; @param Address The MMIO register to read. >> >>> +; >> >>> +; @return The value read. >> >>> +; >> >>> +MmioRead64Internal >> >>> + ldrd r0, r1, [r0] >> >>> + dmb >> >>> + bx lr >> >>> + >> >>> +; >> >>> +; Writes a 64-bit MMIO register. >> >>> +; >> >>> +; Writes the 64-bit MMIO register specified by Address with the value specified >> >>> +; by Value and returns Value. This function must guarantee that all MMIO read >> >>> +; and write operations are serialized. >> >>> +; >> >>> +; If 64-bit MMIO register operations are not supported, then ASSERT(). >> >>> +; >> >>> +; @param Address The MMIO register to write. >> >>> +; @param Value The value to write to the MMIO register. >> >>> +; >> >>> +MmioWrite64Internal >> >>> + dmb st >> >>> + strd r2, r3, [r0] >> >>> + bx lr >> >>> + >> >>> + END >> >>> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf >> >>> b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf >> >>> new file mode 100644 >> >>> index 000000000000..5a1dc87ed2bd >> >>> --- /dev/null >> >>> +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf >> >>> @@ -0,0 +1,50 @@ >> >>> +## @file >> >>> +# Instance of I/O Library using KVM/ARM safe assembler routines >> >>> +# >> >>> +# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.
>> >>> +# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
>> >>> +# Copyright (c) 2017, AMD Incorporated. All rights reserved.
>> >>> +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.
>> >>> +# >> >>> +# This program and the accompanying materials are licensed and made available >> >>> +# under the terms and conditions of the BSD License which accompanies this >> >>> +# distribution. The full text of the license may be found at >> >>> +# http://opensource.org/licenses/bsd-license.php. >> >>> +# >> >>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> >>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> >>> +# >> >>> +## >> >>> + >> >>> +[Defines] >> >>> + INF_VERSION = 0x0001001A >> >>> + BASE_NAME = BaseIoLibIntrinsicArmVirt >> >>> + FILE_GUID = 217102b4-b465-4a1d-a2de-93dd385ec480 >> >>> + MODULE_TYPE = BASE >> >>> + VERSION_STRING = 1.0 >> >>> + LIBRARY_CLASS = IoLib >> >>> + >> >>> +# >> >>> +# VALID_ARCHITECTURES = ARM AARCH64 >> >>> +# >> >>> + >> >>> +[Sources] >> >>> + IoLibMmioBuffer.c >> >>> + BaseIoLibIntrinsicInternal.h >> >>> + IoHighLevel.c >> >>> + >> >>> +[Sources.ARM] >> >>> + IoLibArmVirt.c >> >>> + Arm/ArmVirtMmio.S | GCC >> >>> + Arm/ArmVirtMmio.asm | RVCT >> >>> + >> >>> +[Sources.AARCH64] >> >>> + IoLibArmVirt.c >> >>> + AArch64/ArmVirtMmio.S >> >>> + >> >>> +[Packages] >> >>> + MdePkg/MdePkg.dec >> >>> + >> >>> +[LibraryClasses] >> >>> + DebugLib >> >>> + BaseLib >> >>> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c >> >>> new file mode 100644 >> >>> index 000000000000..154d583246ac >> >>> --- /dev/null >> >>> +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArmVirt.c >> >>> @@ -0,0 +1,641 @@ >> >>> +/** @file >> >>> + I/O Library for ARM. >> >>> + >> >>> + Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
>> >>> + Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
>> >>> + Copyright (c) 2017, AMD Incorporated. All rights reserved.
>> >>> + Copyright (c) 2018, Linaro, Ltd. All rights reserved.
>> >>> + >> >>> + This program and the accompanying materials are licensed and made available >> >>> + under the terms and conditions of the BSD License which accompanies this >> >>> + distribution. The full text of the license may be found at >> >>> + http://opensource.org/licenses/bsd-license.php. >> >>> + >> >>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> >>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> >>> + >> >>> +**/ >> >>> + >> >>> +#include "BaseIoLibIntrinsicInternal.h" >> >>> + >> >>> +UINT8 >> >>> +EFIAPI >> >>> +MmioRead8Internal ( >> >>> + IN UINTN Address >> >>> + ); >> >>> + >> >>> +VOID >> >>> +EFIAPI >> >>> +MmioWrite8Internal ( >> >>> + IN UINTN Address, >> >>> + IN UINT8 Value >> >>> + ); >> >>> + >> >>> +UINT16 >> >>> +EFIAPI >> >>> +MmioRead16Internal ( >> >>> + IN UINTN Address >> >>> + ); >> >>> + >> >>> +VOID >> >>> +EFIAPI >> >>> +MmioWrite16Internal ( >> >>> + IN UINTN Address, >> >>> + IN UINT16 Value >> >>> + ); >> >>> + >> >>> +UINT32 >> >>> +EFIAPI >> >>> +MmioRead32Internal ( >> >>> + IN UINTN Address >> >>> + ); >> >>> + >> >>> +VOID >> >>> +EFIAPI >> >>> +MmioWrite32Internal ( >> >>> + IN UINTN Address, >> >>> + IN UINT32 Value >> >>> + ); >> >>> + >> >>> +UINT64 >> >>> +EFIAPI >> >>> +MmioRead64Internal ( >> >>> + IN UINTN Address >> >>> + ); >> >>> + >> >>> +VOID >> >>> +EFIAPI >> >>> +MmioWrite64Internal ( >> >>> + IN UINTN Address, >> >>> + IN UINT64 Value >> >>> + ); >> >>> + >> >>> +/** >> >>> + Reads an 8-bit I/O port. >> >>> + >> >>> + Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned. >> >>> + This function must guarantee that all I/O read and write operations are >> >>> + serialized. >> >>> + >> >>> + If 8-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to read. >> >>> + >> >>> + @return The value read. >> >>> + >> >>> +**/ >> >>> +UINT8 >> >>> +EFIAPI >> >>> +IoRead8 ( >> >>> + IN UINTN Port >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> + return 0; >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes an 8-bit I/O port. >> >>> + >> >>> + Writes the 8-bit I/O port specified by Port with the value specified by Value >> >>> + and returns Value. This function must guarantee that all I/O read and write >> >>> + operations are serialized. >> >>> + >> >>> + If 8-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to write. >> >>> + @param Value The value to write to the I/O port. >> >>> + >> >>> + @return The value written the I/O port. >> >>> + >> >>> +**/ >> >>> +UINT8 >> >>> +EFIAPI >> >>> +IoWrite8 ( >> >>> + IN UINTN Port, >> >>> + IN UINT8 Value >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> + return Value; >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads a 16-bit I/O port. >> >>> + >> >>> + Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned. >> >>> + This function must guarantee that all I/O read and write operations are >> >>> + serialized. >> >>> + >> >>> + If 16-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to read. >> >>> + >> >>> + @return The value read. >> >>> + >> >>> +**/ >> >>> +UINT16 >> >>> +EFIAPI >> >>> +IoRead16 ( >> >>> + IN UINTN Port >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> + return 0; >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a 16-bit I/O port. >> >>> + >> >>> + Writes the 16-bit I/O port specified by Port with the value specified by Value >> >>> + and returns Value. This function must guarantee that all I/O read and write >> >>> + operations are serialized. >> >>> + >> >>> + If 16-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to write. >> >>> + @param Value The value to write to the I/O port. >> >>> + >> >>> + @return The value written the I/O port. >> >>> + >> >>> +**/ >> >>> +UINT16 >> >>> +EFIAPI >> >>> +IoWrite16 ( >> >>> + IN UINTN Port, >> >>> + IN UINT16 Value >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> + return Value; >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads a 32-bit I/O port. >> >>> + >> >>> + Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned. >> >>> + This function must guarantee that all I/O read and write operations are >> >>> + serialized. >> >>> + >> >>> + If 32-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to read. >> >>> + >> >>> + @return The value read. >> >>> + >> >>> +**/ >> >>> +UINT32 >> >>> +EFIAPI >> >>> +IoRead32 ( >> >>> + IN UINTN Port >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> + return 0; >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a 32-bit I/O port. >> >>> + >> >>> + Writes the 32-bit I/O port specified by Port with the value specified by Value >> >>> + and returns Value. This function must guarantee that all I/O read and write >> >>> + operations are serialized. >> >>> + >> >>> + If 32-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to write. >> >>> + @param Value The value to write to the I/O port. >> >>> + >> >>> + @return The value written the I/O port. >> >>> + >> >>> +**/ >> >>> +UINT32 >> >>> +EFIAPI >> >>> +IoWrite32 ( >> >>> + IN UINTN Port, >> >>> + IN UINT32 Value >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> + return Value; >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads a 64-bit I/O port. >> >>> + >> >>> + Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned. >> >>> + This function must guarantee that all I/O read and write operations are >> >>> + serialized. >> >>> + >> >>> + If 64-bit I/O port operations are not supported, then ASSERT(). >> >>> + If Port is not aligned on a 64-bit boundary, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to read. >> >>> + >> >>> + @return The value read. >> >>> + >> >>> +**/ >> >>> +UINT64 >> >>> +EFIAPI >> >>> +IoRead64 ( >> >>> + IN UINTN Port >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> + return 0; >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a 64-bit I/O port. >> >>> + >> >>> + Writes the 64-bit I/O port specified by Port with the value specified by Value >> >>> + and returns Value. This function must guarantee that all I/O read and write >> >>> + operations are serialized. >> >>> + >> >>> + If 64-bit I/O port operations are not supported, then ASSERT(). >> >>> + If Port is not aligned on a 64-bit boundary, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to write. >> >>> + @param Value The value to write to the I/O port. >> >>> + >> >>> + @return The value written to the I/O port. >> >>> + >> >>> +**/ >> >>> +UINT64 >> >>> +EFIAPI >> >>> +IoWrite64 ( >> >>> + IN UINTN Port, >> >>> + IN UINT64 Value >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> + return 0; >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads an 8-bit I/O port fifo into a block of memory. >> >>> + >> >>> + Reads the 8-bit I/O fifo port specified by Port. >> >>> + The port is read Count times, and the read data is >> >>> + stored in the provided Buffer. >> >>> + >> >>> + This function must guarantee that all I/O read and write operations are >> >>> + serialized. >> >>> + >> >>> + If 8-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to read. >> >>> + @param Count The number of times to read I/O port. >> >>> + @param Buffer The buffer to store the read data into. >> >>> + >> >>> +**/ >> >>> +VOID >> >>> +EFIAPI >> >>> +IoReadFifo8 ( >> >>> + IN UINTN Port, >> >>> + IN UINTN Count, >> >>> + OUT VOID *Buffer >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a block of memory into an 8-bit I/O port fifo. >> >>> + >> >>> + Writes the 8-bit I/O fifo port specified by Port. >> >>> + The port is written Count times, and the write data is >> >>> + retrieved from the provided Buffer. >> >>> + >> >>> + This function must guarantee that all I/O write and write operations are >> >>> + serialized. >> >>> + >> >>> + If 8-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to write. >> >>> + @param Count The number of times to write I/O port. >> >>> + @param Buffer The buffer to retrieve the write data from. >> >>> + >> >>> +**/ >> >>> +VOID >> >>> +EFIAPI >> >>> +IoWriteFifo8 ( >> >>> + IN UINTN Port, >> >>> + IN UINTN Count, >> >>> + IN VOID *Buffer >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads a 16-bit I/O port fifo into a block of memory. >> >>> + >> >>> + Reads the 16-bit I/O fifo port specified by Port. >> >>> + The port is read Count times, and the read data is >> >>> + stored in the provided Buffer. >> >>> + >> >>> + This function must guarantee that all I/O read and write operations are >> >>> + serialized. >> >>> + >> >>> + If 16-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to read. >> >>> + @param Count The number of times to read I/O port. >> >>> + @param Buffer The buffer to store the read data into. >> >>> + >> >>> +**/ >> >>> +VOID >> >>> +EFIAPI >> >>> +IoReadFifo16 ( >> >>> + IN UINTN Port, >> >>> + IN UINTN Count, >> >>> + OUT VOID *Buffer >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a block of memory into a 16-bit I/O port fifo. >> >>> + >> >>> + Writes the 16-bit I/O fifo port specified by Port. >> >>> + The port is written Count times, and the write data is >> >>> + retrieved from the provided Buffer. >> >>> + >> >>> + This function must guarantee that all I/O write and write operations are >> >>> + serialized. >> >>> + >> >>> + If 16-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to write. >> >>> + @param Count The number of times to write I/O port. >> >>> + @param Buffer The buffer to retrieve the write data from. >> >>> + >> >>> +**/ >> >>> +VOID >> >>> +EFIAPI >> >>> +IoWriteFifo16 ( >> >>> + IN UINTN Port, >> >>> + IN UINTN Count, >> >>> + IN VOID *Buffer >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads a 32-bit I/O port fifo into a block of memory. >> >>> + >> >>> + Reads the 32-bit I/O fifo port specified by Port. >> >>> + The port is read Count times, and the read data is >> >>> + stored in the provided Buffer. >> >>> + >> >>> + This function must guarantee that all I/O read and write operations are >> >>> + serialized. >> >>> + >> >>> + If 32-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to read. >> >>> + @param Count The number of times to read I/O port. >> >>> + @param Buffer The buffer to store the read data into. >> >>> + >> >>> +**/ >> >>> +VOID >> >>> +EFIAPI >> >>> +IoReadFifo32 ( >> >>> + IN UINTN Port, >> >>> + IN UINTN Count, >> >>> + OUT VOID *Buffer >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a block of memory into a 32-bit I/O port fifo. >> >>> + >> >>> + Writes the 32-bit I/O fifo port specified by Port. >> >>> + The port is written Count times, and the write data is >> >>> + retrieved from the provided Buffer. >> >>> + >> >>> + This function must guarantee that all I/O write and write operations are >> >>> + serialized. >> >>> + >> >>> + If 32-bit I/O port operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Port The I/O port to write. >> >>> + @param Count The number of times to write I/O port. >> >>> + @param Buffer The buffer to retrieve the write data from. >> >>> + >> >>> +**/ >> >>> +VOID >> >>> +EFIAPI >> >>> +IoWriteFifo32 ( >> >>> + IN UINTN Port, >> >>> + IN UINTN Count, >> >>> + IN VOID *Buffer >> >>> + ) >> >>> +{ >> >>> + ASSERT (FALSE); >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads an 8-bit MMIO register. >> >>> + >> >>> + Reads the 8-bit MMIO register specified by Address. The 8-bit read value is >> >>> + returned. This function must guarantee that all MMIO read and write >> >>> + operations are serialized. >> >>> + >> >>> + If 8-bit MMIO register operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Address The MMIO register to read. >> >>> + >> >>> + @return The value read. >> >>> + >> >>> +**/ >> >>> +UINT8 >> >>> +EFIAPI >> >>> +MmioRead8 ( >> >>> + IN UINTN Address >> >>> + ) >> >>> +{ >> >>> + return MmioRead8Internal (Address); >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes an 8-bit MMIO register. >> >>> + >> >>> + Writes the 8-bit MMIO register specified by Address with the value specified >> >>> + by Value and returns Value. This function must guarantee that all MMIO read >> >>> + and write operations are serialized. >> >>> + >> >>> + If 8-bit MMIO register operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Address The MMIO register to write. >> >>> + @param Value The value to write to the MMIO register. >> >>> + >> >>> +**/ >> >>> +UINT8 >> >>> +EFIAPI >> >>> +MmioWrite8 ( >> >>> + IN UINTN Address, >> >>> + IN UINT8 Value >> >>> + ) >> >>> +{ >> >>> + MmioWrite8Internal (Address, Value); >> >>> + return Value; >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads a 16-bit MMIO register. >> >>> + >> >>> + Reads the 16-bit MMIO register specified by Address. The 16-bit read value is >> >>> + returned. This function must guarantee that all MMIO read and write >> >>> + operations are serialized. >> >>> + >> >>> + If 16-bit MMIO register operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Address The MMIO register to read. >> >>> + >> >>> + @return The value read. >> >>> + >> >>> +**/ >> >>> +UINT16 >> >>> +EFIAPI >> >>> +MmioRead16 ( >> >>> + IN UINTN Address >> >>> + ) >> >>> +{ >> >>> + ASSERT ((Address & 1) == 0); >> >>> + >> >>> + return MmioRead16Internal (Address); >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a 16-bit MMIO register. >> >>> + >> >>> + Writes the 16-bit MMIO register specified by Address with the value specified >> >>> + by Value and returns Value. This function must guarantee that all MMIO read >> >>> + and write operations are serialized. >> >>> + >> >>> + If 16-bit MMIO register operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Address The MMIO register to write. >> >>> + @param Value The value to write to the MMIO register. >> >>> + >> >>> +**/ >> >>> +UINT16 >> >>> +EFIAPI >> >>> +MmioWrite16 ( >> >>> + IN UINTN Address, >> >>> + IN UINT16 Value >> >>> + ) >> >>> +{ >> >>> + ASSERT ((Address & 1) == 0); >> >>> + >> >>> + MmioWrite16Internal (Address, Value); >> >>> + return Value; >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads a 32-bit MMIO register. >> >>> + >> >>> + Reads the 32-bit MMIO register specified by Address. The 32-bit read value is >> >>> + returned. This function must guarantee that all MMIO read and write >> >>> + operations are serialized. >> >>> + >> >>> + If 32-bit MMIO register operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Address The MMIO register to read. >> >>> + >> >>> + @return The value read. >> >>> + >> >>> +**/ >> >>> +UINT32 >> >>> +EFIAPI >> >>> +MmioRead32 ( >> >>> + IN UINTN Address >> >>> + ) >> >>> +{ >> >>> + ASSERT ((Address & 3) == 0); >> >>> + >> >>> + return MmioRead32Internal (Address); >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a 32-bit MMIO register. >> >>> + >> >>> + Writes the 32-bit MMIO register specified by Address with the value specified >> >>> + by Value and returns Value. This function must guarantee that all MMIO read >> >>> + and write operations are serialized. >> >>> + >> >>> + If 32-bit MMIO register operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Address The MMIO register to write. >> >>> + @param Value The value to write to the MMIO register. >> >>> + >> >>> +**/ >> >>> +UINT32 >> >>> +EFIAPI >> >>> +MmioWrite32 ( >> >>> + IN UINTN Address, >> >>> + IN UINT32 Value >> >>> + ) >> >>> +{ >> >>> + ASSERT ((Address & 3) == 0); >> >>> + >> >>> + MmioWrite32Internal (Address, Value); >> >>> + return Value; >> >>> +} >> >>> + >> >>> +/** >> >>> + Reads a 64-bit MMIO register. >> >>> + >> >>> + Reads the 64-bit MMIO register specified by Address. The 64-bit read value is >> >>> + returned. This function must guarantee that all MMIO read and write >> >>> + operations are serialized. >> >>> + >> >>> + If 64-bit MMIO register operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Address The MMIO register to read. >> >>> + >> >>> + @return The value read. >> >>> + >> >>> +**/ >> >>> +UINT64 >> >>> +EFIAPI >> >>> +MmioRead64 ( >> >>> + IN UINTN Address >> >>> + ) >> >>> +{ >> >>> + ASSERT ((Address & 7) == 0); >> >>> + >> >>> + return MmioRead64Internal (Address); >> >>> +} >> >>> + >> >>> +/** >> >>> + Writes a 64-bit MMIO register. >> >>> + >> >>> + Writes the 64-bit MMIO register specified by Address with the value specified >> >>> + by Value and returns Value. This function must guarantee that all MMIO read >> >>> + and write operations are serialized. >> >>> + >> >>> + If 64-bit MMIO register operations are not supported, then ASSERT(). >> >>> + >> >>> + @param Address The MMIO register to write. >> >>> + @param Value The value to write to the MMIO register. >> >>> + >> >>> +**/ >> >>> +UINT64 >> >>> +EFIAPI >> >>> +MmioWrite64 ( >> >>> + IN UINTN Address, >> >>> + IN UINT64 Value >> >>> + ) >> >>> +{ >> >>> + ASSERT ((Address & 7) == 0); >> >>> + >> >>> + MmioWrite64Internal (Address, Value); >> >>> + return Value; >> >>> +} >> >>> -- >> >>> 2.17.0 >> >> >