From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::242; helo=mail-it0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x242.google.com (mail-it0-x242.google.com [IPv6:2607:f8b0:4001:c0b::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C1C172098EA8A for ; Wed, 25 Jul 2018 04:11:32 -0700 (PDT) Received: by mail-it0-x242.google.com with SMTP id p81-v6so8092474itp.1 for ; Wed, 25 Jul 2018 04:11:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=l4yFYrEmaqhr4bwqSeWtkWUmvlLOd9cd0BpY2z/i38I=; b=JMtELqU27m5MfGrVJGXinQ6S541FLso0WG2dvSSBNj7oxpD7VTBnntaruklfVPGu2u xmrvNKewTl936z2qq2w8lq+yW4yiXpFPLiBJxIvlz4yoYI1ZyHmdfolqxNolBtP2pfKK Cx7cXvPgadmRp9iW/uUHmDTNP6jNmwNQaSH4A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=l4yFYrEmaqhr4bwqSeWtkWUmvlLOd9cd0BpY2z/i38I=; b=VikmpA4rArCYXS1UjSlQaShuoKvThf6mKJQ95lu4ze/36ZazbJtlvkfsddrwanaZo5 WRqCKfPcyJ0TEizNSltObsaNCM6vtFWlrB4jymgfMIM1ZEcrfjZNPc816oi+VzpYRRso CkOcK7MxDfAjl4Nt1iWFHpUSWz5V8RWdTL/uUKegxVhlL8OGFfkqO6HQYiDodozqP3GF +E4p6EWkzrsrROPagZSP10xC+1SAjaQ8iGsLevgk2o+3U96OlgLQK8f/LoDXxASvaenI MWgabefQbA0Y3FbL/Fmo7/vcU74xOSurhl19EdWVCtJgIK6baq2RDPm4+9bwhuXWgfy5 apIw== X-Gm-Message-State: AOUpUlGG2VZkv1QxsVjwKi7S6NgWfUQAKl1kE+zimIyFq+KpzLQXmo9/ 48MQkdj/RJzE2jY4Lf9Je3jml66ocKa/4sgaJNyn8A== X-Google-Smtp-Source: AAOMgpezNNyj89lLxu3pLIH4EMFSErsOLMMmkxzJg54ZZXNp6S55qFp2uunubIwOT3gQ+5GK0wbzdGDuWSVNMaDu3H4= X-Received: by 2002:a24:610d:: with SMTP id s13-v6mr5875515itc.68.1532517091461; Wed, 25 Jul 2018 04:11:31 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:ac05:0:0:0:0:0 with HTTP; Wed, 25 Jul 2018 04:11:31 -0700 (PDT) In-Reply-To: <20180713081540.8414-1-ming.huang@linaro.org> References: <20180713081540.8414-1-ming.huang@linaro.org> From: Ard Biesheuvel Date: Wed, 25 Jul 2018 13:11:31 +0200 Message-ID: To: Ming Huang Cc: Leif Lindholm , linaro-uefi , "edk2-devel@lists.01.org" , Graeme Gregory , guoheyi@huawei.com, wanghuiqiang , huangming , Jason Zhang , huangdaode@hisilicon.com, John Garry Subject: Re: [PATCH edk2-platforms v3 0/6] Improve D0x platforms and bug fix X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Jul 2018 11:11:33 -0000 Content-Type: text/plain; charset="UTF-8" On 13 July 2018 at 10:15, Ming Huang wrote: > The major features of this patchset include: > 1 Fix invoke SetMemorySpaceAttributes error bug > 2 Correct ATU Cfg0/Cfg1 base address > 3 Fix SetAtuConfig1RW bug > 4 Add PlatformMiscDxe driver > 5 optimize two pcie prots space > 6 Correct smbios product name > > BTW: > 1 D06 source will upstream in July; > 2 Installing OS by iso is supported by edk2 commit(824b6e3b5f). > > Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git > branch: platforms-20180627-v3 > > > Jason Zhang (1): > Hisilicon/D03/D05: Correct ATU Cfg0/Cfg1 base address > > Ming Huang (5): > Hisilicon/D0x: Fix invoke SetMemorySpaceAttributes error bug > Hisilicon/D0x: Fix SetAtuConfig1RW bug > Hisilicon/D05: Add PlatformMiscDxe driver > Hisilicon/D05/Pcie: optimize two pcie ports space > Hisilicon/D0x: Correct smbios product name > Patches 1-4 and 6 Reviewed-by: Ard Biesheuvel Pushed as 2c4d662506bd..a34ea15dbf31 For the legacy INTx issue, I would like to gain a better understanding first of why this issue is particular to D0x. > .../DS3231RealTimeClockLib.inf | 2 + > Platform/Hisilicon/D05/D05.dsc | 13 +-- > Platform/Hisilicon/D05/D05.fdf | 1 + > .../Drivers/PlatformMiscDxe/PlatformMiscDxe.c | 99 +++++++++++++++++++ > .../PlatformMiscDxe/PlatformMiscDxe.inf | 47 +++++++++ > .../Library/PlatformPciLib/PlatformPciLib.c | 8 +- > .../PciHostBridgeDxe/PciRootBridgeIo.c | 13 +-- > .../Type01/MiscSystemManufacturerFunction.c | 1 - > .../Hi1616/D05AcpiTables/D05Iort.asl | 8 +- > .../Hi1616/D05AcpiTables/D05Mcfg.aslc | 8 +- > .../Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 32 +++--- > 11 files changed, 191 insertions(+), 41 deletions(-) > create mode 100644 Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c > create mode 100644 Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf > > -- > 2.17.0 >