From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::235; helo=mail-it0-x235.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x235.google.com (mail-it0-x235.google.com [IPv6:2607:f8b0:4001:c0b::235]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 04DCA2096891D for ; Thu, 12 Jul 2018 07:37:10 -0700 (PDT) Received: by mail-it0-x235.google.com with SMTP id h2-v6so5305873itj.1 for ; Thu, 12 Jul 2018 07:37:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=O5EZ9fJufZOsE9w1vZ57ZkCE85XY/7N6+lGiMNmYMww=; b=QLgocILueK0Leb9nVBMmxD9ke5Vurxzvi9auLy2LQOS8/aTnUJ7NrHP0exSzZPO0g8 7TvabJgn34Br3+JKmY2MqZcfvY1OjR3MkA7xNSz/HtHaXO6vbQZrHCzPzIq8UvauhwnF i7lyN6zb2W4KXpcuuq/jyfmnnLbM0z1eGQVmE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=O5EZ9fJufZOsE9w1vZ57ZkCE85XY/7N6+lGiMNmYMww=; b=iCktYVYRWKLbnQm++GZzPf6mUBUWUao5UAx2PWTDLDUjbNuqy08QV3y5TJEOZdNz5O 91nP6sLgCEV/Te794xteBzXewV6GI3ddEdEj6X3Ua+tVxeJCdVoK8c2n5IP1Y7c4pHJj eBQbaCQ4VztCXcWnHODi+PwvEs+A/Z/q9i0D4R4RIrb/Hw4xyX7gs7gOmyxwzjMYZwKl 0rAwpCNRso1eHwdudDwC3b0uAa+afxN5eoB8eaiBFxFHdkyW3PvQTxDfD3oFvqvobb4i /kFxzmstrUbd3oU6H1wr/l6NHFgkWZu8beyPag6WvlX1ENnIx/wkEDkXfn89nbEMpCak RBSA== X-Gm-Message-State: AOUpUlHsbYSamazh9f7JaiSZBFSZzi35/9Gu1QMLfs//qFzJaU8PTAzo /peN7OMPCtL0DO7yNI22wkbI+p8IoZlvYdBwyv3CCw== X-Google-Smtp-Source: AAOMgpfz4LNfKvhv4BIK07NsISvmwLr8LMcDcvupebVAMJhZL3mAETggeVhVBqyj/w7S/97ScwbDUxnPFp8H+W3zBHQ= X-Received: by 2002:a02:6001:: with SMTP id i1-v6mr1779681jac.5.1531406230293; Thu, 12 Jul 2018 07:37:10 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:bbc7:0:0:0:0:0 with HTTP; Thu, 12 Jul 2018 07:37:09 -0700 (PDT) In-Reply-To: <1531381201-5022-4-git-send-email-mw@semihalf.com> References: <1531381201-5022-1-git-send-email-mw@semihalf.com> <1531381201-5022-4-git-send-email-mw@semihalf.com> From: Ard Biesheuvel Date: Thu, 12 Jul 2018 16:37:09 +0200 Message-ID: To: Marcin Wojtas Cc: "edk2-devel@lists.01.org" , Leif Lindholm , Nadav Haklai , Hanna Hawa , =?UTF-8?B?SmFuIETEhWJyb8Wb?= , Grzegorz Jaszczyk Subject: Re: [platforms: PATCH 3/6] Marvell/Library: Armada7k8kSoCDescLib: Enable getting CP base address X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Jul 2018 14:37:11 -0000 Content-Type: text/plain; charset="UTF-8" On 12 July 2018 at 09:39, Marcin Wojtas wrote: > For upcoming patches there is a need to get the CP110 base address, > introduce according getter function for it. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > --- > Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 6 ++++++ > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 11 +++++++++++ > 2 files changed, 17 insertions(+) > > diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > index d2bcf2a..56efdbe 100644 > --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > @@ -36,6 +36,12 @@ ArmadaSoCDescComPhyGet ( > IN OUT UINTN *DescCount > ); > > +UINTN If this is a memory address, you should use EFI_PHYSICAL_ADDRESS here. > +EFIAPI > +ArmadaSoCDescCpBaseGet ( > + IN UINTN CpIndex > + ); > + > // > // I2C > // > diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > index 6ce6bad..c7c9c13 100644 > --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > @@ -61,6 +61,17 @@ ArmadaSoCDescComPhyGet ( > return EFI_SUCCESS; > } > > +UINTN > +EFIAPI > +ArmadaSoCDescCpBaseGet ( > + IN UINTN CpIndex > + ) > +{ > + ASSERT (CpIndex < FixedPcdGet8 (PcdMaxCpCount)); > + > + return MV_SOC_CP_BASE (CpIndex); > +} > + > EFI_STATUS > EFIAPI > ArmadaSoCDescI2cGet ( > -- > 2.7.4 >