From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::242; helo=mail-io0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x242.google.com (mail-io0-x242.google.com [IPv6:2607:f8b0:4001:c06::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3E07422198F6C for ; Sat, 23 Dec 2017 05:30:19 -0800 (PST) Received: by mail-io0-x242.google.com with SMTP id e204so27169612iof.12 for ; Sat, 23 Dec 2017 05:35:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=7/scNB3b23n7GPELvddjhpcV/NoERqYWd4glRpDGwkE=; b=eDSYHFxXZXdkvrvBSVryOcXEmEaemhTE8mAAuwGORUwbndovSq1uX0zvn5A140OumP wGVu2HD/H5FjuqTELQYkM8YPNQD+Efp1vfLOGOTMFUYMyCW2pC9Co79pTmAgg8oP/XEH GDrhFKnTh4aXXKQIrR7TtcwtLoJpLvThjD+QU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=7/scNB3b23n7GPELvddjhpcV/NoERqYWd4glRpDGwkE=; b=jYqAeC+BauMY65URJKAZyiIr2vX4yGOOGnPx0UMGnl/AKUxiLy7NX3B4J4zHikxz6R AEcwTgJ07r52A3YlYt7mV2TD4J0znRmTvpidE4KbfQzd7RtahoN972t+sAd2c6oHvSKR /XGqk2Tp/sflwJp8A2Mc4AVO43x56NOpNXPhXAKiAVlOh7K8Q6gD6vYPz4fyYwek//Wc vANuv1rBD+5Cvb9N5AFSaZDlWmgfsHEDR/O4EgwX/l4VLnJ+F0FBu17p3wJlcqDz7HFl Ck5eoR4fAZbw4VEOF6sx8oeuOsLuqC8mCeaDmkCoOuLEFRsRBC+uR1VEsr+7ZU0DzQY5 3TQA== X-Gm-Message-State: AKGB3mIphbudWnI9jpJ5K7rPN+GmXdcioiV7oE04ardSbIXTXxlr/d1f Ex5ytnUXxdeZxjAg2zLodn2JnBZf1JL+2Kxynfjg0w== X-Google-Smtp-Source: ACJfBosHGK0alMNsRYPN2LgecCj6k6CiUEJSeUNVcLAuEgVh3MmhkyyfZLXzD4ChbKD5IuFPLP14g/nWxrC4TNoUDuw= X-Received: by 10.107.27.84 with SMTP id b81mr21631584iob.43.1514036109678; Sat, 23 Dec 2017 05:35:09 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.52.14 with HTTP; Sat, 23 Dec 2017 05:35:09 -0800 (PST) In-Reply-To: <20171222183418.8616-11-evan.lloyd@arm.com> References: <20171222183418.8616-1-evan.lloyd@arm.com> <20171222183418.8616-11-evan.lloyd@arm.com> From: Ard Biesheuvel Date: Sat, 23 Dec 2017 13:35:09 +0000 Message-ID: To: Evan Lloyd Cc: "edk2-devel@lists.01.org" , <"ard.biesheuvel@linaro.org"@arm.com>, <"leif.lindholm@linaro.org"@arm.com>, <"Matteo.Carlini@arm.com"@arm.com>, <"nd@arm.com"@arm.com> Subject: Re: [PATCH v2 10/13] ArmPlatformPkg: Additional display modes X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 23 Dec 2017 13:30:19 -0000 Content-Type: text/plain; charset="UTF-8" On 22 December 2017 at 18:34, wrote: > From: Girish Pathak > > Add definitions for new display modes such as HD 720. > This has no effect on existing display drivers. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Girish Pathak > Signed-off-by: Evan Lloyd Reviewed-by: Ard Biesheuvel > --- > ArmPlatformPkg/Include/Library/LcdPlatformLib.h | 60 ++++++++++++++++++++ > 1 file changed, 60 insertions(+) > > diff --git a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h > index 02be124f00ff5c34c3f8c07ff16ebb4ffc1ba20f..82426f7c903cff09de962e9b7ce10bb2568d340c 100644 > --- a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h > +++ b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h > @@ -26,6 +26,11 @@ > #define WSXGA 4 > #define UXGA 5 > #define HD 6 > +#define WVGA 7 > +#define QHD 8 > +#define WSVGA 9 > +#define HD720 10 > +#define WXGA 11 > > // VGA Mode: 640 x 480 > #define VGA_H_RES_PIXELS 640 > @@ -118,6 +123,61 @@ > #define HD_V_FRONT_PORCH ( 3 - 1) > #define HD_V_BACK_PORCH ( 32 - 1) > > +// WVGA Mode: 800 x 480 > +#define WVGA_H_RES_PIXELS 800 > +#define WVGA_V_RES_PIXELS 480 > +#define WVGA_OSC_FREQUENCY 29500000 /* 0x01C22260 */ > +#define WVGA_H_SYNC ( 72 - 1) > +#define WVGA_H_FRONT_PORCH ( 24 - 1) > +#define WVGA_H_BACK_PORCH ( 96 - 1) > +#define WVGA_V_SYNC ( 7 - 1) > +#define WVGA_V_FRONT_PORCH ( 3 - 1) > +#define WVGA_V_BACK_PORCH ( 10 - 1) > + > +// QHD Mode: 960 x 540 > +#define QHD_H_RES_PIXELS 960 > +#define QHD_V_RES_PIXELS 540 > +#define QHD_OSC_FREQUENCY 40750000 /* 0x026DCBB0 */ > +#define QHD_H_SYNC ( 96 - 1) > +#define QHD_H_FRONT_PORCH ( 32 - 1) > +#define QHD_H_BACK_PORCH (128 - 1) > +#define QHD_V_SYNC ( 5 - 1) > +#define QHD_V_FRONT_PORCH ( 3 - 1) > +#define QHD_V_BACK_PORCH ( 14 - 1) > + > +// WSVGA Mode: 1024 x 600 > +#define WSVGA_H_RES_PIXELS 1024 > +#define WSVGA_V_RES_PIXELS 600 > +#define WSVGA_OSC_FREQUENCY 49000000 /* 0x02EBAE40 */ > +#define WSVGA_H_SYNC (104 - 1) > +#define WSVGA_H_FRONT_PORCH ( 40 - 1) > +#define WSVGA_H_BACK_PORCH (144 - 1) > +#define WSVGA_V_SYNC ( 10 - 1) > +#define WSVGA_V_FRONT_PORCH ( 3 - 1) > +#define WSVGA_V_BACK_PORCH ( 11 - 1) > + > +// HD720 Mode: 1280 x 720 > +#define HD720_H_RES_PIXELS 1280 > +#define HD720_V_RES_PIXELS 720 > +#define HD720_OSC_FREQUENCY 74500000 /* 0x0470C7A0 */ > +#define HD720_H_SYNC (128 - 1) > +#define HD720_H_FRONT_PORCH ( 64 - 1) > +#define HD720_H_BACK_PORCH (192 - 1) > +#define HD720_V_SYNC ( 5 - 1) > +#define HD720_V_FRONT_PORCH ( 3 - 1) > +#define HD720_V_BACK_PORCH ( 20 - 1) > + > +// WXGA Mode: 1280 x 800 > +#define WXGA_H_RES_PIXELS 1280 > +#define WXGA_V_RES_PIXELS 800 > +#define WXGA_OSC_FREQUENCY 83500000 /* 0x04FA1BE0 */ > +#define WXGA_H_SYNC (128 - 1) > +#define WXGA_H_FRONT_PORCH ( 72 - 1) > +#define WXGA_H_BACK_PORCH (200 - 1) > +#define WXGA_V_SYNC ( 6 - 1) > +#define WXGA_V_FRONT_PORCH ( 3 - 1) > +#define WXGA_V_BACK_PORCH ( 22 - 1) > + > // Colour Masks > #define LCD_24BPP_RED_MASK 0x00FF0000 > #define LCD_24BPP_GREEN_MASK 0x0000FF00 > -- > Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") >