From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::d43; helo=mail-io1-xd43.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io1-xd43.google.com (mail-io1-xd43.google.com [IPv6:2607:f8b0:4864:20::d43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 505FD21199243 for ; Tue, 11 Dec 2018 06:06:56 -0800 (PST) Received: by mail-io1-xd43.google.com with SMTP id l3so638869ioc.10 for ; Tue, 11 Dec 2018 06:06:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=oYUmGGc2tY9SMH7ruKBLpUKKpncPZFvUB8Jzr61PQi0=; b=Y6U11Gv7BFhLMvchj2KjIV414eH9l8EOm5tEFAr+RaUtr/LXJs/TdAOLCsaWq9NnVb MoBu59i2CYbm8NtyMaDl2jpAvoJYSR3MzzmInbw/cCNryla+fZLxYehCqxcC6z0FnOrr GsePdkctPAsEYlTt4pmjO6FCz6ww22wezYFMk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=oYUmGGc2tY9SMH7ruKBLpUKKpncPZFvUB8Jzr61PQi0=; b=KSzL6mlxrcLVcVrMiNG04n99Dk/S6prklHaaVbJETIwhPxYoG3lziQttv0YyCQfzLA zNA7D3pElz4/64kBe8mKj7IAQWbAsLe8gvV7K5xS/HpOZJAoJNBRUmfNwOxxaZte3xeF kuTorcrhm764LoVJGnqbXWMNjlqZyrU2tuBhAA7o+tXHDfMQkdfPIgs+VpNvgj+J1TN8 9NZnWjn9KJeQAiihH1FqfRl6c0bf+Sgd8Who/RNI3dnd9YzHTPf0GCJMzTYNOIwx0d3t VAfmskmJLqQtyVzeMNcCryO8bXTh8v3Yzpk4Ah2FGeMFWdqi0gtnvG1zwMEyhhxbiIVS 9wuw== X-Gm-Message-State: AA+aEWZZFwZvBE9ItnAhSlw5JvoImzNIFfE9d/7bMzq+cb2YS226PcCU TWyEX3cy1gWbvMxxazHaFFxK8aUGTwVCaThNOP+XHt3t X-Google-Smtp-Source: AFSGD/WZQ8jhawFRf8EnAGzDQ98GUaIADAcqccxYu1ZTBxM7SRVA/WyKRo4G7hZJoqu2ZT49uQ4XU8gvxqPauoWpvto= X-Received: by 2002:a6b:5d01:: with SMTP id r1mr12590341iob.170.1544537215577; Tue, 11 Dec 2018 06:06:55 -0800 (PST) MIME-Version: 1.0 References: <20181211132510.21359-1-ard.biesheuvel@linaro.org> <20181211140318.kkciujb52xsqgf3c@bivouac.eciton.net> In-Reply-To: <20181211140318.kkciujb52xsqgf3c@bivouac.eciton.net> From: Ard Biesheuvel Date: Tue, 11 Dec 2018 15:06:44 +0100 Message-ID: To: Leif Lindholm Cc: "edk2-devel@lists.01.org" Subject: Re: [PATCH] ArmPkg/DefaultExceptionHandlerLib ARM: avoid endless loop in RELEASE builds X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Dec 2018 14:06:56 -0000 Content-Type: text/plain; charset="UTF-8" On Tue, 11 Dec 2018 at 15:03, Leif Lindholm wrote: > > On Tue, Dec 11, 2018 at 02:25:10PM +0100, Ard Biesheuvel wrote: > > Ensure that we prevent the CPU from proceeding after having taken an > > unhandled exception on a RELEASE build, which does not contain the > > ASSERT() which ensures this on DEBUG and NOOPT builds. > > Sounds like a good idea. > Some silly questions below: > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Ard Biesheuvel > > --- > > ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > > index 0b9da031b47d..9d96d5aabd96 100644 > > --- a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > > +++ b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c > > @@ -267,10 +267,15 @@ DefaultExceptionHandler ( > > DEBUG ((EFI_D_ERROR, "\n")); > > ASSERT (FALSE); > > > > + if (!PcAdjust) { > > Won't this always be 0 for a RELEASE build? (By convention if nothing else.) > And won't we already have ASSERTed in any other case? > Yeah. I had it in my mind that you could set PcAdjust from the debugger, but that doesn't really fly given that the optimizer will just get rid of it in a RELEASE build, and you'd hit the ASSERT() otherwise. > > + CpuDeadLoop (); > > + } > > + > > // Clear the error registers that we have already displayed incase some one wants to keep going > > SystemContext.SystemContextArm->DFSR = 0; > > SystemContext.SystemContextArm->IFSR = 0; > > > > // If some one is stepping past the exception handler adjust the PC to point to the next instruction > > SystemContext.SystemContextArm->PC += PcAdjust; > > + > > Hmm? > Oops.