From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
Jaswinder Singh <jaswinder.singh@linaro.org>,
Masahisa Kojima <masahisa.kojima@linaro.org>
Subject: Re: [PATCH edk2-platforms] Silicon/Socionext/SynQuacer: update PHY reference clock rate
Date: Thu, 26 Apr 2018 19:05:44 +0200 [thread overview]
Message-ID: <CAKv+Gu94J8_DAJvX6NBe1+v-3hrQaNOcwQn0in685GNADrkWMQ@mail.gmail.com> (raw)
In-Reply-To: <20180419153830.jfyl4uk2mbwunwsk@bivouac.eciton.net>
On 19 April 2018 at 17:38, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Mon, Apr 16, 2018 at 01:00:58PM +0200, Ard Biesheuvel wrote:
>> As reported by Kojima-san, the PHY reference clock value we use in our
>> ACPI and DT descriptions is out of sync with the hardware. Replace
>> 125 MHz with 250 MHz throughout.
>>
>> Cc: Masahisa Kojima <masahisa.kojima@linaro.org>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
Thanks
Pushed as 6c816b0e4175
prev parent reply other threads:[~2018-04-26 17:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-16 11:00 [PATCH edk2-platforms] Silicon/Socionext/SynQuacer: update PHY reference clock rate Ard Biesheuvel
2018-04-16 11:25 ` Masahisa Kojima
2018-04-19 11:15 ` Ard Biesheuvel
2018-04-19 14:53 ` Masahisa Kojima
2018-04-19 15:38 ` Leif Lindholm
2018-04-26 17:05 ` Ard Biesheuvel [this message]
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