Re: [PATCH v2 01/13] ArmPkg/ArmLib: add support for reading the max physical address space size

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

On Tue, 27 Nov 2018 at 00:02, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
>
> On Mon, Nov 26, 2018 at 11:43 PM Philippe Mathieu-Daudé
> <philmd@redhat.com> wrote:
> >
> > On 26/11/18 23:37, Ard Biesheuvel wrote:
> > > Add a helper function that returns the maximum physical address space
> > > size as supported by the current CPU.
> > >
> > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> >
> > Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> >
> > > ---
> > >  ArmPkg/Include/Library/ArmLib.h               | 17 +++++++++++++++++
> > >  ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 16 ++++++++++++++++
> > >  ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S     |  8 ++++++++
> > >  3 files changed, 41 insertions(+)
> > >
> > > diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
> > > index ffda50e9d767..b22879fe6e94 100644
> > > --- a/ArmPkg/Include/Library/ArmLib.h
> > > +++ b/ArmPkg/Include/Library/ArmLib.h
> > > @@ -29,6 +29,17 @@
> > >  #define EFI_MEMORY_CACHETYPE_MASK   (EFI_MEMORY_UC | EFI_MEMORY_WC | \
> > >                                       EFI_MEMORY_WT | EFI_MEMORY_WB | \
> > >                                       EFI_MEMORY_UCE)
> > > +//
> > > +// ARM_MMU_IDMAP_RANGE defines the maximum size of the identity mapping
> > > +// that covers the entire address space when running in UEFI. This is
> > > +// limited to what can architecturally be mapped using a 4 KB granule,
> > > +// even if the hardware is capable of mapping more using larger pages.
> > > +//
> > > +#ifdef MDE_CPU_ARM
> > > +#define ARM_MMU_IDMAP_RANGE     (1ULL << 32)
> > > +#else
> > > +#define ARM_MMU_IDMAP_RANGE     (1ULL << 48)
> > > +#endif
> > >
> > >  /**
> > >   * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes.
> > > @@ -733,4 +744,10 @@ ArmWriteCntvOff (
> > >    UINT64   Val
> > >    );
> > >
> > > +UINTN
> > > +EFIAPI
> > > +ArmGetPhysicalAddressBits (
> > > +  VOID
> > > +  );
> > > +
> > >  #endif // __ARM_LIB__
> > > diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
> > > index 1ef2f61f5979..7332601241aa 100644
> > > --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
> > > +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
> > > @@ -196,4 +196,20 @@ ASM_FUNC(ArmWriteSctlr)
> > >  3:msr   sctlr_el3, x0
> > >  4:ret
> > >
> > > +ASM_FUNC(ArmGetPhysicalAddressBits)
> > > +  mrs   x0, id_aa64mmfr0_el1
> > > +  adr   x1, .LPARanges
> > > +  and   x0, x0, #7
> > > +  ldrb  w0, [x1, x0]
> > > +  ret
> > > +
> > > +//
> > > +// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
> > > +// physical address space support on this CPU:
> > > +// 0 == 32 bits, 1 == 36 bits, etc etc
> > > +// 6 and 7 are reserved
>
> Oops the comment is now invalid for the index == 6.
>

Ah yes, I'll fix that up before adding your R-b.

> > > +//
> > > +.LPARanges:
> > > +  .byte 32, 36, 40, 42, 44, 48, 52, -1
> > > +
> > >  ASM_FUNCTION_REMOVE_IF_UNREFERENCED
> > > diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S
> > > index f2a517671f0a..f2f3c9a25991 100644
> > > --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S
> > > +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S
> > > @@ -165,4 +165,12 @@ ASM_FUNC(ArmWriteCpuActlr)
> > >    isb
> > >    bx      lr
> > >
> > > +ASM_FUNC (ArmGetPhysicalAddressBits)
> > > +  mrc     p15, 0, r0, c0, c1, 4   // MMFR0
> > > +  and     r0, r0, #0xf            // VMSA [3:0]
> > > +  cmp     r0, #5                  // >5 implies LPAE support
> > > +  movlt   r0, #32                 // 32 bits if no LPAE
> > > +  movge   r0, #40                 // 40 bits if LPAE
> > > +  bx      lr
> > > +
> > >  ASM_FUNCTION_REMOVE_IF_UNREFERENCED
> > >