From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-it0-x236.google.com (mail-it0-x236.google.com [IPv6:2607:f8b0:4001:c0b::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 118F91A1DF3 for ; Fri, 9 Sep 2016 05:59:30 -0700 (PDT) Received: by mail-it0-x236.google.com with SMTP id c198so12406114ith.1 for ; Fri, 09 Sep 2016 05:59:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=W7Xb3dYtHLY6v3J3jN8g2I32/gXS50jReJthUdbY240=; b=VRU1jEb5GupXY6H+EtGo/8p/mjevIpUaCLK6/ccy7yJ4EAanxVXKzahgMUWL2+wHe8 Z+23oP12adidYpum79iFTErNShtIdIfQ7jS4mEhs/RiOsdVTfuykMJ48xG2c3Ur7BtjG g2zyULJF5rVSgRRAqcjZhLZvpbMMDyej0aRMY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=W7Xb3dYtHLY6v3J3jN8g2I32/gXS50jReJthUdbY240=; b=aADBV4zeDBstZ1qtDBkep5BrC1k8KwbQOpBDstACDeGfovk+aPK0/NoAv5/6+kiePZ BsuhQ4zz8AMAd6o5ju21HXnY6x3H9OOqxSUio/4UOMYF96H+tdARRFLk6GfzhYSnkkDc e6D4cA2EML3cZLk9A4uy9k8UEv3jmpBPNPKVttI1SVgesWcNYym0MtWSug8pvrhzTTFJ 2Lpg2gFcxVK8riDvq3N/x8dM6ijv18Re2jrDP7YEbrURcEGnwxkKC6BFNzUaXRK/Wt+b JWFls1waWYwL0DUu8RG4QJgquNbsDSscGZavL/WKGds2Fcumc18K0z7veFSfNmDVGMoO MhLg== X-Gm-Message-State: AE9vXwMuZk+wIAr6p5HhdF2lIYsNkpyzX1lHnXAYDJeiKbLgc7vJ35SIsv43WXvphBPLckXIkVHjGjzSNBoF72zz X-Received: by 10.157.16.83 with SMTP id o19mr5255760oto.194.1473425969303; Fri, 09 Sep 2016 05:59:29 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.204.195 with HTTP; Fri, 9 Sep 2016 05:59:28 -0700 (PDT) In-Reply-To: <20160909123429.GP16080@bivouac.eciton.net> References: <1473423502-7061-1-git-send-email-ard.biesheuvel@linaro.org> <20160909123429.GP16080@bivouac.eciton.net> From: Ard Biesheuvel Date: Fri, 9 Sep 2016 13:59:28 +0100 Message-ID: To: Leif Lindholm Cc: edk2-devel-01 Subject: Re: [PATCH v2] ArmPlatformPkg/NorFlashDxe: use strictly aligned CopyMem() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Sep 2016 12:59:30 -0000 Content-Type: text/plain; charset=UTF-8 On 9 September 2016 at 13:34, Leif Lindholm wrote: > On Fri, Sep 09, 2016 at 01:18:22PM +0100, Ard Biesheuvel wrote: >> The UEFI spec stipulates that unaligned accesses should be enabled >> on CPUs that support them, which means all of them, given that we >> no longer support pre-v7 ARM cores, and the AARCH64 bindings mandate >> support for unaligned accesses unconditionally. >> >> This means that one should not assume that CopyMem () is safe to call >> on regions that may be mapped using device attributes, which is the >> case for the NOR flash. Since we have no control over the mappings when >> running under the OS, and given that write accesses require device >> mappings, we should not call CopyMem () in the read path either, but >> use our own implementation that is guaranteed to take alignment into >> account. >> >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Signed-off-by: Ard Biesheuvel > > That's a lot less complex, thanks. > Reviewed-by: Leif Lindholm > Pushed, thanks.