From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
Daniel Thompson <daniel.thompson@linaro.org>,
Masami Hiramatsu <masami.hiramatsu@linaro.org>
Subject: Re: [PATCH edk2-platforms 0/8] SynQuacer updates
Date: Tue, 12 Dec 2017 18:38:53 +0000 [thread overview]
Message-ID: <CAKv+Gu9ChhjUO3g9LXkMB9LsH3Fs6psFYX6zB_xQuPt0XXe7fw@mail.gmail.com> (raw)
In-Reply-To: <20171212182058.e7axjy2vyimeavih@bivouac.eciton.net>
On 12 December 2017 at 18:20, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Tue, Dec 12, 2017 at 10:37:59AM +0000, Ard Biesheuvel wrote:
>> A round of updates for Socionext SynQuacer:
>>
>> - enable CPU idle states in the DT, so that the OS can put cores to sleep
>> using PSCI (#1)
>> - add the build number to PCDs that end up in user visible strings (#2)
>> - fix a PCIe detection issue in the DeveloperBox x16 slot, by keeping PERST#
>> asserted for at least 100 ms before link training (#3)
>> - ignore PCIe RC #0 if no card is inserted on EVB (#4 - #6)
>> - add the secondary UART to the DT for the OS to use (this is UART #0 on the
>> LS connector on DeveloperBox) (#7)
>> - explicitly retrain the downstream links on the Asmedia 1182/1184 PCIe
>> switch, to enable Gen2 speeds
>
> For the patches I haven't commented on individually (1,4,6):
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
Thanks. Pushed as 2b3b95cb9fc9..054921cef0f1
>> Ard Biesheuvel (7):
>> Silicon/SynQuacer: enable CPU idle states in device tree
>> Platform/Socionext/SynQuacer: expose build number as firmware version
>> Silicon/SynQuacerPciHostBridgeLib: stall for 150 ms during PERST#
>> Silicon/SynQuacerPciHostBridgeLib: enable RCs based on PCD setting
>> Silicon/SynQuacer: disable PCI RC #0 DT node if disabled
>> Silicon/SynQuacerEvalBoard: enable PCI #0 only when card is detected
>> Silicon/SynQuacer/PlatformDxe: retrain PCIe switch links to Gen2 speed
>>
>> Masahisa KOJIMA (1):
>> Silicon/Socionext/SynQuacer/DeviceTree: expose SCP serial port to the
>> OS
>>
>> Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 16 ++-
>> Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 1 +
>> Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc | 6 +-
>> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 18 ++-
>> Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 1 +
>> Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc | 6 +-
>> Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 57 ++++----
>> Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pcie.c | 140 ++++++++++++++++++++
>> Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 13 +-
>> Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h | 37 ++++++
>> Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 3 +
>> Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c | 94 +++++++++++++
>> Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf | 42 ++++++
>> Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.c | 19 ++-
>> Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf | 4 +
>> Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c | 58 +++++---
>> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 70 +++++++---
>> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 2 +
>> Silicon/Socionext/SynQuacer/SynQuacer.dec | 5 +
>> 19 files changed, 504 insertions(+), 88 deletions(-)
>> create mode 100644 Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pcie.c
>> create mode 100644 Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h
>> create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c
>> create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.inf
>>
>> --
>> 2.11.0
>>
prev parent reply other threads:[~2017-12-12 18:34 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-12 10:37 [PATCH edk2-platforms 0/8] SynQuacer updates Ard Biesheuvel
2017-12-12 10:38 ` [PATCH edk2-platforms 1/8] Silicon/SynQuacer: enable CPU idle states in device tree Ard Biesheuvel
2017-12-12 10:38 ` [PATCH edk2-platforms 2/8] Platform/Socionext/SynQuacer: expose build number as firmware version Ard Biesheuvel
2017-12-12 18:17 ` Leif Lindholm
2017-12-12 18:20 ` Ard Biesheuvel
2017-12-12 18:24 ` Leif Lindholm
2017-12-12 18:28 ` Ard Biesheuvel
2017-12-12 18:33 ` Leif Lindholm
2017-12-12 10:38 ` [PATCH edk2-platforms 3/8] Silicon/SynQuacerPciHostBridgeLib: stall for 150 ms during PERST# Ard Biesheuvel
2017-12-12 17:24 ` Leif Lindholm
2017-12-12 10:38 ` [PATCH edk2-platforms 4/8] Silicon/SynQuacerPciHostBridgeLib: enable RCs based on PCD setting Ard Biesheuvel
2017-12-12 10:38 ` [PATCH edk2-platforms 5/8] Silicon/SynQuacer: disable PCI RC #0 DT node if disabled Ard Biesheuvel
2017-12-12 14:54 ` Ard Biesheuvel
2017-12-12 17:32 ` Leif Lindholm
2017-12-12 17:35 ` Ard Biesheuvel
2017-12-12 17:50 ` Leif Lindholm
2017-12-12 18:09 ` Ard Biesheuvel
2017-12-12 18:15 ` Leif Lindholm
2017-12-12 10:38 ` [PATCH edk2-platforms 6/8] Silicon/SynQuacerEvalBoard: enable PCI #0 only when card is detected Ard Biesheuvel
2017-12-12 10:38 ` [PATCH edk2-platforms 7/8] Silicon/Socionext/SynQuacer/DeviceTree: expose SCP serial port to the OS Ard Biesheuvel
2017-12-12 17:37 ` Leif Lindholm
2017-12-12 10:38 ` [PATCH edk2-platforms 8/8] Silicon/SynQuacer/PlatformDxe: retrain PCIe switch links to Gen2 speed Ard Biesheuvel
2017-12-12 17:47 ` Leif Lindholm
2017-12-12 17:51 ` Ard Biesheuvel
2017-12-12 18:15 ` Leif Lindholm
2017-12-12 18:20 ` [PATCH edk2-platforms 0/8] SynQuacer updates Leif Lindholm
2017-12-12 18:38 ` Ard Biesheuvel [this message]
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