From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::244; helo=mail-it0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x244.google.com (mail-it0-x244.google.com [IPv6:2607:f8b0:4001:c0b::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C82DA202E60EF for ; Fri, 20 Oct 2017 09:06:46 -0700 (PDT) Received: by mail-it0-x244.google.com with SMTP id n195so14565070itg.0 for ; Fri, 20 Oct 2017 09:10:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=xENbMxdmsF6OIG/zhqiqjLk+fUIcXCO7o6bTKoHKE4A=; b=TEAtTD1QJ81CJO1WsuWVn5sAMOmfG/td/Au+DovgYhez4CzabxaAE67NNATchkUU5G GZQ1pEusbt6CjICswEeVt+I0bveRMldwgPjRScj9yub3UXXsWKtYTi1eQgtKw1lsOk0D 7ZUrutShsxGo1yOSuz2sSyHtGcGlVNs5Ci7bE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=xENbMxdmsF6OIG/zhqiqjLk+fUIcXCO7o6bTKoHKE4A=; b=f1uMqwUoYrv9ocYBNsVDyWC9U7U6u7/20kZJxCyio3qvPs5EeVu8vHwusYeWmw7PIj dRLU6VRhNbyvRyBAgc1xeCnOzssdGX+z5k1bnKrJPLIhFr4qTSWHH9d0uER5DDWXGp3Q 6AKa6pPofNLNBGukOkDWilx7ptECJJjn3Obp1jQakP6+zINMsS7Rd1gaViR2tFfm5T+d kQKVrM34B6u8EVWdPOO8MfLByVnq6LxRyCwSSbXaoH1gWFQxV94RSo01Pwy3uDA8e5PH UHILWDUDMvzRYKMUWqgC+cF8+bSQD3odWXlYtl82corL/A6rCTh0xeX0tafuND2/Appw YREg== X-Gm-Message-State: AMCzsaX8HTIR3l3pfHiDeJjUPSRtrVgmA7x1YL89lO8zX4OtTRAHfj4Y rvSU8JHq9UH4ff9DbNgLyttIriaEkCgbjZ2bRvkZkA== X-Google-Smtp-Source: ABhQp+QVxuRbIHHMbl+vM7bBd1VKjghC+RzzQsAQMpi7D5ETNlkcp7qm489YHoJ5hoSNENuua8M+gyLUH5TWje6yqMM= X-Received: by 10.36.254.140 with SMTP id w134mr3256839ith.73.1508515825317; Fri, 20 Oct 2017 09:10:25 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.131.167 with HTTP; Fri, 20 Oct 2017 09:10:24 -0700 (PDT) In-Reply-To: <51d0ef33-022f-7153-9acd-9bc4a26cdd59@redhat.com> References: <20171020112325.10814-1-ard.biesheuvel@linaro.org> <20171020130024.l73uww7cxsjnwbsv@bivouac.eciton.net> <51d0ef33-022f-7153-9acd-9bc4a26cdd59@redhat.com> From: Ard Biesheuvel Date: Fri, 20 Oct 2017 17:10:24 +0100 Message-ID: To: Laszlo Ersek Cc: Leif Lindholm , "edk2-devel@lists.01.org" Subject: Re: [PATCH] ArmPlatformPkg/PrePeiCore: seed temporary stack before entering PEI core X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 20 Oct 2017 16:06:47 -0000 Content-Type: text/plain; charset="UTF-8" On 20 October 2017 at 16:43, Laszlo Ersek wrote: > On 10/20/17 15:00, Leif Lindholm wrote: >> On Fri, Oct 20, 2017 at 12:23:25PM +0100, Ard Biesheuvel wrote: >>> DEBUG builds of PEI code will print a diagnostic message regarding >>> the utilization of temporary RAM before switching to permanent RAM. >>> For example, >>> >>> Total temporary memory: 16352 bytes. >>> temporary memory stack ever used: 4820 bytes. >>> temporary memory heap used for HobList: 4720 bytes. >>> >>> Tracking stack utilization like this requires the stack to be seeded >>> with a known magic value, and this needs to occur before entering C >>> code, given that it uses the stack. Currently, only Nt32Pkg appears >>> to implement this feature, but it is useful nonetheless, so let's >>> wire it up for PrePeiCore. >>> >>> Contributed-under: TianoCore Contribution Agreement 1.1 >>> Signed-off-by: Ard Biesheuvel >>> --- >>> ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 7 +++++++ >>> ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S | 10 ++++++++++ >>> ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm | 10 ++++++++++ >>> 3 files changed, 27 insertions(+) >>> >>> diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S >>> index aab5edab0c42..7a33e2754869 100644 >>> --- a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S >>> +++ b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S >>> @@ -13,6 +13,8 @@ >>> >>> #include >>> >>> +#define INIT_CAR_VALUE 0x5AA55AA55AA55AA5 >>> + >>> ASM_FUNC(_ModuleEntryPoint) >>> // Do early platform specific actions >>> bl ASM_PFX(ArmPlatformPeiBootAction) >>> @@ -84,4 +86,9 @@ _PrepareArguments: >>> >>> _SetupPrimaryCoreStack: >>> mov sp, x1 >>> + MOV64 (x8, FixedPcdGet64(PcdCPUCoresStackBase)) >>> + MOV64 (x9, INIT_CAR_VALUE) >>> +0:stp x9, x9, [x8], #16 >>> + cmp x8, x1 >>> + b.lt 0b >>> b _PrepareArguments >>> diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S >>> index 14344425ad4c..7342e49bea59 100644 >>> --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S >>> +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S >>> @@ -13,6 +13,8 @@ >>> >>> #include >>> >>> +#define INIT_CAR_VALUE 0x5AA55AA5 >>> + >> >> Worth moving to a common header somewhere? >> >> Also defined/used in MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c. > > Furthermore, open-coded in: > > EmulatorPkg/Unix/Host/Host.c: *StackPointer = 0x5AA55AA5; > Nt32Pkg/Sec/SecMain.c: *StackPointer = 0x5AA55AA5; > > Honestly I think it should be a Fixed-At-Build PCD, in MdeModulePkg.dec, > similarly to > > gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue > > in MdePkg.dec. > Yes. And you both know how the MdeModulePkg maintainers are going to respond if I propose adding another PCD. > I'm unhappy that we have to annoy Ard with a request to "upstream" this > constant to MdeModulePkg in some form, but we'll need it yet again in > OVMF... > >> >> That file has an explicit comment saying "temporary memory is filled >> with this initial value during SEC phase". Should this end have a >> corresponding comment saying "checked for during PEI phase"? > > Thanks > Laszlo > >> >> / >> Leif >> >>> ASM_FUNC(_ModuleEntryPoint) >>> // Do early platform specific actions >>> bl ASM_PFX(ArmPlatformPeiBootAction) >>> @@ -65,6 +67,14 @@ _PrepareArguments: >>> >>> _SetupPrimaryCoreStack: >>> mov sp, r1 >>> + MOV32 (r8, FixedPcdGet64(PcdCPUCoresStackBase)) >>> + MOV32 (r9, INIT_CAR_VALUE) >>> + mov r10, r9 >>> + mov r11, r9 >>> + mov r12, r9 >>> +0:stm r8!, {r9-r12} >>> + cmp r8, r1 >>> + blt 0b >>> b _PrepareArguments >>> >>> _NeverReturn: >>> diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm >>> index abea675828df..7455de8aa66e 100644 >>> --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm >>> +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm >>> @@ -13,6 +13,8 @@ >>> >>> #include >>> >>> +#define INIT_CAR_VALUE 0x5AA55AA5 >>> + >>> INCLUDE AsmMacroIoLib.inc >>> >>> IMPORT CEntryPoint >>> @@ -79,6 +81,14 @@ _PrepareArguments >>> >>> _SetupPrimaryCoreStack >>> mov sp, r1 >>> + mov32 r8, FixedPcdGet64(PcdCPUCoresStackBase) >>> + mov32 r9, INIT_CAR_VALUE >>> + mov r10, r9 >>> + mov r11, r9 >>> + mov r12, r9 >>> +0:stm r8!, {r9-r12} >>> + cmp r8, r1 >>> + blt 0b >>> b _PrepareArguments >>> >>> _NeverReturn >>> -- >>> 2.11.0 >>> >