From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=XVLL4g+9; spf=pass (domain: linaro.org, ip: 209.85.166.65, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-io1-f65.google.com (mail-io1-f65.google.com [209.85.166.65]) by groups.io with SMTP; Thu, 16 May 2019 07:16:56 -0700 Received: by mail-io1-f65.google.com with SMTP id g84so2730268ioa.1 for ; Thu, 16 May 2019 07:16:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=TNO4ryT2n2n7OAabBPJjQ7jN3KLhhvKrgX8WJqhBD5s=; b=XVLL4g+9LDJMuGscP1bXGr1rBUQSlbsfdZjF3lntql0zflXGsJjVYous4OTs3Q2Pc3 wiUmossYXv5UYI2cXyVeJASN9AiilaVd2f6z5/FPwA16RZhLYWTc9VgHCBXO7qfC6YE1 VIHsHhKQPGbn9SkF4zqPzJsSu0lbr6vrUdJd34l1bkytSMXSXrarjryJaPwqmixOOPYc o51X+kxZcn4AT+nQFdKq6p4/JM1mam7kI4jmDQJSbgLXXSq8pjpvb3uqF/tiCJfhxSBl TrD6CUWud70nDjx18XZX4SjVdBTb2aVijSpBi7iYeQTDSRdnlh+w8zhHnD6+phYKvZ0W Z+Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=TNO4ryT2n2n7OAabBPJjQ7jN3KLhhvKrgX8WJqhBD5s=; b=NFwdVERzdyduDoH0yVhsb3MU+wev+7atoaWVJs6R+z6y77BVjkkIF7okNDAL1I2ILA xxY4swtSm6euyrXBMnQhPAaEk4HDi+fRjrRABSv/hQUkvGBMhtgEEtQ2o9NxnAS0S8aU Po88K/VSlIte0BeIGfzraZDmprklGaNbRvIkJ1XJ9ChE1Z1bzYD+JulI+q8f2ChGMgsE rW4z7dEv6mDGWxIqa7S9WMoi02PoYDHL/cWALmXLD9IkdBCQnfDcWxFXVp0YWPEv931P 9C4tCDifuJAKaKyUngOj2xuhdViYSUDwlZWLaz9FyiEe6gMc/7fRWz2VclOGB/icWW+/ PbLQ== X-Gm-Message-State: APjAAAXsu618iiLcmpt0MOP798lZMvSe+k+vbPsdpYP1VZPM0bEZk9uw XXhLeV2aFd2RI5V5pwId/3ckyo4F54GHDkp7OmgR2w== X-Google-Smtp-Source: APXvYqxqrYkShlnnzX0YgUoDFXL+gjVcXWILBf9q2QOL7rMRqAVxbqIGK/h7FUDI2rmvxqgy2TtJzoSVfNcC1brZipk= X-Received: by 2002:a6b:ea12:: with SMTP id m18mr28377050ioc.173.1558016215572; Thu, 16 May 2019 07:16:55 -0700 (PDT) MIME-Version: 1.0 References: <1557395622-32425-1-git-send-email-mw@semihalf.com> <1557395622-32425-9-git-send-email-mw@semihalf.com> In-Reply-To: <1557395622-32425-9-git-send-email-mw@semihalf.com> From: "Ard Biesheuvel" Date: Thu, 16 May 2019 16:16:44 +0200 Message-ID: Subject: Re: [edk2-platforms: PATCH 08/14] Marvell/Armada7k8k: Enable PCIE support To: Marcin Wojtas Cc: edk2-devel-groups-io , Leif Lindholm , =?UTF-8?B?SmFuIETEhWJyb8Wb?= , Grzegorz Jaszczyk , Kostya Porotchkin , Jici Gao , Rebecca Cran , kettenis@jive.eu Content-Type: text/plain; charset="UTF-8" On Thu, 9 May 2019 at 11:54, Marcin Wojtas wrote: > > Wire up the platform libraries to the generic drivers so that we can use > PCI devices and UEFI, and leave the controller initialized so that the > OS can boot it using a generic driver of its own. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > --- > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 17 +++++++++++++++-- > Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 5 +++++ > 2 files changed, 20 insertions(+), 2 deletions(-) > > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > index 545b369..f78a76b 100644 > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > @@ -70,8 +70,10 @@ > IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf > CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > - PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf > - PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf > + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > + PciHostBridgeLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.inf > + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf > + PciExpressLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciExpressLib/PciExpressLib.inf > > # Basic UEFI services libraries > UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > @@ -407,6 +409,12 @@ > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000 > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000 > > + # PCIE > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 > + > + # SoC Configuration Space > + gMarvellTokenSpaceGuid.PcdConfigSpaceBaseAddress|0xE0000000 > + > !if $(CAPSULE_ENABLE) > [PcdsDynamicExDefault.common.DEFAULT] > gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100 > @@ -520,6 +528,11 @@ > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf > Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf > > + # PCI > + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf This driver requires gArmTokenSpaceGuid.PcdPciIoTranslation to be set to a sane value. Are you sure this is the case for your platforms? > + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf > + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > + > # Console packages > MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf > index 3a320ba..e22f514 100644 > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf > @@ -174,6 +174,11 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c > INF MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf > INF Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf > > + # PCI > + INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf > + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf > + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > + > # Multiple Console IO support > INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > -- > 2.7.4 >