From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::243; helo=mail-io0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x243.google.com (mail-io0-x243.google.com [IPv6:2607:f8b0:4001:c06::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 55E652034D833 for ; Tue, 7 Nov 2017 05:26:33 -0800 (PST) Received: by mail-io0-x243.google.com with SMTP id 134so2111421ioo.0 for ; Tue, 07 Nov 2017 05:30:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=FSXCNyC3NSKGXglPPJqnDKvPhhbYB5TU+C9op5HykmI=; b=PURt07lqetRyQCHPM3JPA156QkQtbieXsU3ITGy+Q3TEmI1b3v2xrgqcmVPI0kgC8G tkkP/fc9ZA0xACT3Ojd7N5DMOoYAac1pVOUdh3YVcdKXu3BeGyXEbTMZIZWKGGmLij3a scrilQJE/fvU2104jhK69hNe51NZ1F6hcYlNs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=FSXCNyC3NSKGXglPPJqnDKvPhhbYB5TU+C9op5HykmI=; b=tRYDeUf5oFmZRho+xecYMCv7km1DO4F0ees45Jj4qhsc1j78yBVN2p3FB1pxw+eVuc K0h8KpPa0hzbdNZn3ZGaA2EN1kuupPS6NtbTlDSkQ+VF/sVU4iXqJGf+OfH+Wr+MpSin EvIaYRqHx/p+WrHj2pd31470gkEuRus2QwTMjT2Fon8F3ea72kaEiFFrD6cNX+vE51Kx Z2kZSrd270UNvSW20LFx/nGrlRlsNgyPV1EetQRea7GXbgB633NqGzS849O7S4P2Y2HR AYg6JHqxETRunPR7/QeUIoxOnm4KfRrF5B5PwhE4UVz/3VVJIAxfF3+dfeUCs71WxoBm T+jA== X-Gm-Message-State: AJaThX7QGdCi9bLtGgqzfhScshLmIbgFcWIkpFMrm34+OoRn5721rhGb R//eDvsKzgWFRp22AqbIl5sgMVVaPLsqBJ12lZm+BQ== X-Google-Smtp-Source: ABhQp+TMVg6l3s82eE+wFg1m0gAbnQYq8AcXiTa3rs8K5VXB+WwaVb+BTGiBpM3/MEL7LCsZzyeW1QTpd0oNhCoKUBk= X-Received: by 10.107.174.206 with SMTP id n75mr11392924ioo.43.1510061432335; Tue, 07 Nov 2017 05:30:32 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.131.167 with HTTP; Tue, 7 Nov 2017 05:30:31 -0800 (PST) In-Reply-To: <20171107132911.al3ovu6wjah6sjfm@bivouac.eciton.net> References: <1510059411-6608-1-git-send-email-heyi.guo@linaro.org> <1510059411-6608-2-git-send-email-heyi.guo@linaro.org> <20171107132911.al3ovu6wjah6sjfm@bivouac.eciton.net> From: Ard Biesheuvel Date: Tue, 7 Nov 2017 13:30:31 +0000 Message-ID: To: Leif Lindholm Cc: Heyi Guo , linaro-uefi , "edk2-devel@lists.01.org" , Peicong Li Subject: Re: [PATCH] ArmPkg/ArmMmuLib: Add new attribute WRITE_BACK_NONSHAREABLE X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Nov 2017 13:26:33 -0000 Content-Type: text/plain; charset="UTF-8" On 7 November 2017 at 13:29, Leif Lindholm wrote: > On Tue, Nov 07, 2017 at 01:22:19PM +0000, Ard Biesheuvel wrote: >> On 7 November 2017 at 12:56, Heyi Guo wrote: >> > From: Peicong Li >> > >> > Flash region needs to be set as cacheable (write back) to increase >> > performance, if PEI is still XIP on flash or DXE FV is decompressed >> > from flash FV. However some ARM platforms do not support to set flash >> > as inner shareable since flash is not normal DDR memory and it will >> > not respond to cache snoop request, which will causes system hang >> > after MMU is enabled. >> > >> > So we need a new ARM memory region attribute WRITE_BACK_NONSHAREABLE >> > for flash region on these platforms specifically. This attribute will >> > set the region as write back but not inner shared. >> > >> > Contributed-under: TianoCore Contribution Agreement 1.1 >> > Signed-off-by: Peicong Li >> > Signed-off-by: Heyi Guo >> > Cc: Leif Lindholm >> > Cc: Ard Biesheuvel >> >> Reviewed-by: Ard Biesheuvel > > Reviewed-by: Leif Lindholm > Pushed as 829633e3a82d. Thanks! >> > --- >> > ArmPkg/Include/Library/ArmLib.h | 7 +++++++ >> > ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 4 ++++ >> > 2 files changed, 11 insertions(+) >> > >> > diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h >> > index 24ffe9f..38199be 100644 >> > --- a/ArmPkg/Include/Library/ArmLib.h >> > +++ b/ArmPkg/Include/Library/ArmLib.h >> > @@ -41,6 +41,13 @@ typedef enum { >> > ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED, >> > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK, >> > ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK, >> > + // On some platforms, memory mapped flash region is designed as not supporting >> > + // shareable attribute, so WRITE_BACK_NONSHAREABLE is added for such special >> > + // need. >> > + // Do NOT use below two attributes if you are not sure. >> > + ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE, >> > + ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE, >> > + >> > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH, >> > ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH, >> > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE, >> > diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c >> > index 8bd1c6f..4b62ecb 100644 >> > --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c >> > +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c >> > @@ -35,6 +35,10 @@ ArmMemoryAttributeToPageAttribute ( >> > ) >> > { >> > switch (Attributes) { >> > + case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE: >> > + case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE: >> > + return TT_ATTR_INDX_MEMORY_WRITE_BACK; >> > + >> > case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK: >> > case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK: >> > return TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE; >> > -- >> > 2.7.2.windows.1 >> >